US2022157735A1PendingUtilityA1

Copper interconnect cladding

Assignee: INTEL CORPPriority: Mar 27, 2018Filed: Jan 27, 2022Published: May 19, 2022
Est. expiryMar 27, 2038(~11.7 yrs left)· nominal 20-yr term from priority
H10P 14/6548H10W 20/435H10W 20/48H10W 20/42H10W 20/039H10W 20/425H10W 20/033H10W 20/037H10W 20/049H10D 89/00H01L 23/5226H01L 21/02362H01L 23/5283H01L 27/0203H01L 21/76852H01L 23/53238H01L 23/5329
54
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Claims

Abstract

An integrated circuit includes: a front end of line (FEOL) circuit including a transistor; and a back end of line circuit above the FEOL circuit and including insulator material having an interconnect feature therein. The interconnect feature includes: a core including copper; a first layer between the insulator material and the core, the first layer being distinct from the core; a second layer between the first layer and the core, the second layer being distinct from the first layer and the core, the second layer including a first metal and a second metal different from the first metal; and a capping member on the core and the second layer, the capping member including the second metal. In an embodiment, the first metal and the second metal are part of a solid solution in the second layer. In an embodiment, the first metal is ruthenium and the second metal is cobalt.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An integrated circuit structure, comprising:
 a dielectric layer having a recess therein;   a conductive core within the recess, the conductive core having a top, sides, and a bottom;   a solid solution liner along the sides and the bottom of the conductive core, the solid solution liner having a top, sides, and a bottom;   a diffusion barrier along the sides and the bottom of the solid solution liner, the diffusion barrier having a top, sides, and a bottom; and   a conductive cap on the top of the conductive core and on the top of the solid solution liner, wherein the conductive cap is not on the top of the diffusion barrier.   
     
     
         2 . The integrated circuit structure of  claim 1 , wherein the sides and the bottom of the diffusion barrier are in contact with the dielectric layer. 
     
     
         3 . The integrated circuit structure of  claim 1 , wherein the conductive core comprises copper. 
     
     
         4 . The integrated circuit structure of  claim 1 , wherein the diffusion barrier comprises tantalum. 
     
     
         5 . The integrated circuit structure of  claim 1 , wherein the solid solution liner and the conductive cap comprise cobalt. 
     
     
         6 . An integrated circuit structure, comprising:
 a dielectric layer having a recess therein, the recess having sides and a bottom;   a diffusion barrier along the sides and the bottom of the dielectric layer, the diffusion barrier having a top, sides, and a bottom;   a solid solution liner along the sides and the bottom of the diffusion barrier, the solid solution liner having a top, sides, and a bottom;   a conductive core within the sides and the bottom of the solid solution liner, the conductive core having a top, sides, and a bottom; and   a conductive cap on the top of the conductive core and on the top of the solid solution liner, wherein the conductive cap is not on the top of the diffusion barrier.   
     
     
         7 . The integrated circuit structure of  claim 6 , wherein the diffusion barrier are in contact with the sides and the bottom of the dielectric layer. 
     
     
         8 . The integrated circuit structure of  claim 6 , wherein the conductive core comprises copper. 
     
     
         9 . The integrated circuit structure of  claim 6 , wherein the diffusion barrier comprises tantalum. 
     
     
         10 . The integrated circuit structure of  claim 6 , wherein the solid solution liner and the conductive cap comprise cobalt. 
     
     
         11 . A computing device, comprising:
 a board; and   a component coupled to the board, the component including an integrated circuit structure, comprising:
 a dielectric layer having a recess therein; 
 a conductive core within the recess, the conductive core having a top, sides, and a bottom; 
 a solid solution liner along the sides and the bottom of the conductive core, the solid solution liner having a top, sides, and a bottom; 
 a diffusion barrier along the sides and the bottom of the solid solution liner, the diffusion barrier having a top, sides, and a bottom; and 
 a conductive cap on the top of the conductive core and on the top of the solid solution liner, wherein the conductive cap is not on the top of the diffusion barrier. 
   
     
     
         12 . The computing device of  claim 11 , further comprising:
 a memory coupled to the board.   
     
     
         13 . The computing device of  claim 11 , further comprising:
 a communication chip coupled to the board.   
     
     
         14 . The computing device of  claim 11 , wherein the component is a packaged integrated circuit die. 
     
     
         15 . The computing device of  claim 11 , wherein the component is selected from the group consisting of a processor, a communications chip, and a digital signal processor. 
     
     
         16 . A computing device, comprising:
 a board; and   a component coupled to the board, the component including an integrated circuit structure, comprising:
 a dielectric layer having a recess therein, the recess having sides and a bottom; 
 a diffusion barrier along the sides and the bottom of the dielectric layer, the diffusion barrier having a top, sides, and a bottom; 
 a solid solution liner along the sides and the bottom of the diffusion barrier, the solid solution liner having a top, sides, and a bottom; 
 a conductive core within the sides and the bottom of the solid solution liner, the conductive core having a top, sides, and a bottom; and 
 a conductive cap on the top of the conductive core and on the top of the solid solution liner, wherein the conductive cap is not on the top of the diffusion barrier. 
   
     
     
         17 . The computing device of  claim 16 , further comprising:
 a memory coupled to the board.   
     
     
         18 . The computing device of  claim 16 , further comprising:
 a communication chip coupled to the board.   
     
     
         19 . The computing device of  claim 16 , wherein the component is a packaged integrated circuit die. 
     
     
         20 . The computing device of  claim 16 , wherein the component is selected from the group consisting of a processor, a communications chip, and a digital signal processor.

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