Flip-chip on leadframe having partially etched landing sites

Abstract

A flip-chip on leadframe package includes a leadframe having a plurality of leads with each lead including an inner leadfinger portion, wherein at least a landing region of all of the inner leadfinger portions are in a single common level (or plane) and include etched areas providing bump pads having concave landing sites (landing sites). A semiconductor die (die) having an active top side surface with functional circuitry including bond pads has bumps or pillars thereon. An area of the landing sites is greater than an area of the bumps or pillars. A distal end of the bumps or pillars is within and electrically coupling to the landing sites. A mold material encapsulates the die and at least a portion of the inner leadfinger portions. The package can be a leaded package or a leadless package.

1 . An integrated circuit (IC) package, comprising:
 a semiconductor die; and   a leadframe including a plurality of leads, each of the plurality of leads including a recessed portion, the recessed portion including a recess plane parallel to a plane of the lead and side walls at an obtuse angle with respect to the recess plane, each of the plurality of leads electrically coupled to the semiconductor die.   
     
     
         2 . The IC package of  claim 1 , wherein each of the plurality of leads is electrically coupled to the semiconductor die via a plurality of bumps. 
     
     
         3 . The IC package of  claim 2 , wherein each of the plurality of bumps touches the recessed portion. 
     
     
         4 . The IC package of  claim 2 , wherein each of the plurality of bumps includes solder. 
     
     
         5 . The IC package of  claim 1 , wherein each of the plurality of leads includes a landing site having the recessed portion. 
     
     
         6 . The IC package of  claim 5 , wherein the landing site includes a layer of metal alloy on copper. The IC package of  claim 1 , further comprising a mold material covering portions of the semiconductor die and at least a portion of the plurality of leads. 
     
     
         8 . An integrated circuit (IC) package, comprising:
 a semiconductor die;   a lead frame including a plurality of leads, each of the plurality of leads having a concave portion with a semi-circular cross-sectional shape;   a metal alloy on the concave portion;   a solder cap in the concave portion;   a metal pillar on the solder cap and electrically connected to the semiconductor die; and   mold material covering portions of the semiconductor die and the plurality of leads;
 wherein each of the plurality of leads include a first portion with a first thickness and a second portion with a second thickness, a surface of the second portion coplanar with a surface of the mold compound, the first thickness being lesser than the second thickness. 
   
     
     
         9 . The IC package of  claim 8 , wherein the concave portion is in the first portion. 
     
     
         10 . The IC package of  claim 8 , wherein each of the plurality of leads includes a landing site having the concave portion. 
     
     
         11 . The IC package of  claim 10 , wherein the metal pillar is aligned with the landing site. 
     
     
         12 . The IC package of  claim 8 , wherein the lead frame is of a copper or a copper alloy. 
     
     
         13 . The IC package of  claim 8 , wherein the semiconductor die includes an active surface with functional circuitry including bond pads thereon, and wherein the active surface faces the concave portion.