Apparatus and Method for Testing Semiconductor Devices

Abstract

The invention is a test system for testing silicon wafers or packaged devices. The system includes a tester having multiple testing stacks that each hold a vertical stack of test engines, data buffers, pin drivers, and other resources, which are electrically connected on one side to a wafer or DUT and on the other side to a test host computer via fast data links. Each testing stack is disposed on a top side of a wafer contactor electrically connected to a wafer or a load board electrically connected to a DUT. The system includes a cooling system to remove heat during operation. The system minimizes the data signal path between the pads of the devices being tested and the pin drivers of the tester, the test engines, and the test host computer. High performance is possible by the connection of bottom of each testing stack directly to the wafer contactor.

What is claimed is: 
     
         1 . A device for testing a silicon wafer, comprising:
 a plurality of vertical stacks of test boards, wherein each of said test boards are electrically connected to a host computer;   a corresponding plurality of electrical connectors, each electrically connected to each of said test boards in a corresponding one of said vertical stacks of test boards and disposed at the bottom of said corresponding one of said vertical stacks of test boards;   a plate having a top side and a bottom side, wherein each of said plurality of vertical stacks of test boards and corresponding plurality of electrical connectors is disposed on said top side of said plate, wherein said plate comprises an electrical trace between each of said corresponding plurality of electrical connectors to a corresponding location on said bottom side of said plate for electrical connection to a silicon wafer under test.