US2022130763A1PendingUtilityA1

Enabling long interconnect bridges

Assignee: INTEL CORPPriority: Dec 28, 2016Filed: Jan 10, 2022Published: Apr 28, 2022
Est. expiryDec 28, 2036(~10.4 yrs left)· nominal 20-yr term from priority
H10W 90/724H10W 70/685H10W 90/401H10W 90/00H10W 70/611H10W 70/618H10W 44/248H10W 44/20H10W 70/65H01L 23/5383H01L 25/0655H01L 2224/16225H01L 23/5385H01L 23/5381
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Claims

Abstract

A device and method of utilizing a repeater circuit to extend the viable length of an interconnect bridge. Integrated circuit packages using a repeater circuit in a repeater die, embedded in a substrate, and included in an interconnect bridge are show. Methods of connecting semiconductor dies using interconnect bridges coupled with repeater circuits are shown.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a substrate;   a first semiconductor die attached to the substrate;   a second semiconductor die attached to the substrate;   an interconnect bridge comprising silicon, the interconnect bridge at least partially embedded in the substrate, the interconnect bridge electrically coupled to the first semiconductor die and the second semiconductor die, the interconnect bridge to provide communication between the first semiconductor die and the second semiconductor die; and   a repeater circuit electrically coupled to the interconnect bridge along a communication path between the first semiconductor die and the second semiconductor die.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the interconnect bridge is coupled to the first semiconductor die with one or more solder balls that contact both the interconnect bridge and the first semiconductor die. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the interconnect bridge is coupled to the second semiconductor die with one or more solder balls that contact both the interconnect bridge and the second semiconductor die. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the interconnect bridge is located directly adjacent to both the first semiconductor die and the second semiconductor die. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the repeater circuit is included in a memory die. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the repeater circuit is located between the first semiconductor die and the second semiconductor die. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the repeater circuit is included in the interconnect bridge. 
     
     
         8 . The semiconductor device of  claim 1 , wherein the repeater circuit is powered via the interconnect bridge. 
     
     
         9 . A semiconductor device comprising:
 a substrate;   a first semiconductor die attached to the substrate;   a second semiconductor die attached to the substrate;   an interconnect bridge comprising silicon, the interconnect bridge at least partially embedded in the substrate, the interconnect bridge electrically coupled to the first semiconductor die and the second semiconductor die, the interconnect bridge to provide communication between the first semiconductor die and the second semiconductor die; and   a third semiconductor die including a repeater circuit, the third semiconductor die electrically coupled to the interconnect bridge along a communication path between the first semiconductor die and the second semiconductor die.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the third semiconductor die is attached to the substrate between the first semiconductor die and the second semiconductor die. 
     
     
         11 . The semiconductor device of  claim 9 , wherein the interconnect bridge is coupled to the first semiconductor die with one or more solder balls that contact both the interconnect bridge and the first semiconductor die. 
     
     
         12 . The semiconductor device of  claim 11 , wherein the interconnect bridge is coupled to the second semiconductor die with one or more solder balls that contact both the interconnect bridge and the second semiconductor die. 
     
     
         13 . The semiconductor device of  claim 12 , wherein the interconnect bridge is coupled to the third semiconductor die with one or more solder balls that contact both the interconnect bridge and the third semiconductor die. 
     
     
         14 . The semiconductor device of  claim 9 , wherein an edge of the third semiconductor die extends past an edge of the interconnect bridge creating an overhang, and wherein the overhang is used for power delivery to the third die. 
     
     
         15 . The semiconductor device of  claim 9 , wherein the third semiconductor die is a memory die. 
     
     
         16 . The semiconductor device of  claim 9 , wherein the repeater circuit is powered via the interconnect bridge.

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