US2022102392A1PendingUtilityA1

Semiconductor device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Jun 29, 2007Filed: Dec 10, 2021Published: Mar 31, 2022
Est. expiryJun 29, 2027(~0.9 yrs left)· nominal 20-yr term from priority
Inventors:Hajime Kimura
H10D 86/0241H10D 86/0214H10D 86/40H10D 86/471H10D 86/60H01L 27/1251H01L 27/1266H01L 27/1292H01L 27/1214
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Claims

Abstract

It is an object to provide a semiconductor device which has a large size and operates at high speed. A top gate transistor which includes a semiconductor layer of single-crystal and a bottom gate transistor which includes a semiconductor layer of amorphous silicon (microcrystalline silicon) are formed over the same substrate. Then, gate electrodes of each transistor are formed with the same layer, and source and drain electrodes are also formed with the same layer. Thus, manufacturing steps are reduced. In other words, two types of transistors can be manufactured by adding only a few steps to the manufacturing process of a bottom gate transistor.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a first semiconductor layer over an insulating substrate;   a first insulating layer over the first semiconductor layer and the insulating substrate;   a first conductive layer and a second conductive layer over the first insulating layer;   a second insulating layer over the first conductive layer, the second conductive layer and the first insulating layer;   a second semiconductor layer over the second insulating layer; and   a third conductive layer over the second semiconductor layer,   wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer,   wherein the first semiconductor layer serves as an active layer of a first transistor,   wherein the second semiconductor layer serves as an active layer of a second transistor, and   wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the first insulating layer serves as a gate insulating layer of the first transistor, and   wherein the first conductive layer serves as a gate electrode of the first transistor.   
     
     
         3 . The semiconductor device according to  claim 1 ,
 wherein the second insulating layer serves as a gate insulating layer of the second transistor, and   wherein the second conductive layer serves as a gate electrode of the second transistor.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein the second semiconductor layer includes a microcrystalline semiconductor. 
     
     
         5 . A display device, comprising the semiconductor device according to  claim 1  and display element. 
     
     
         6 . A semiconductor device comprising:
 a first semiconductor layer over an insulating substrate, the first semiconductor layer having crystallinity;   a first insulating layer over the first semiconductor layer and the insulating substrate;   a first conductive layer and a second conductive layer over the first insulating layer;   a second insulating layer over the first conductive layer, the second conductive layer and the first insulating layer;   a second semiconductor layer over the second insulating layer; and   a third conductive layer over the second semiconductor layer,   wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer,   wherein the first semiconductor layer serves as an active layer of a first transistor,   wherein the second semiconductor layer serves as an active layer of a second transistor, and   wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein the first insulating layer serves as a gate insulating layer of the first transistor, and   wherein the first conductive layer serves as a gate electrode of the first transistor.   
     
     
         8 . The semiconductor device according to  claim 6 ,
 wherein the second insulating layer serves as a gate insulating layer of the second transistor, and   wherein the second conductive layer serves as a gate electrode of the second transistor.   
     
     
         9 . The semiconductor device according to  claim 6 , wherein the second semiconductor layer includes a microcrystalline semiconductor. 
     
     
         10 . A display device, comprising the semiconductor device according to  claim 6  and display element. 
     
     
         11 . A semiconductor device comprising:
 a first semiconductor layer over an insulating substrate, the first semiconductor layer having crystallinity;   a first insulating layer over the first semiconductor layer and the insulating substrate;   a first conductive layer and a second conductive layer over the first insulating layer;   a second insulating layer over the first conductive layer, the second conductive layer and the first insulating layer;   a second semiconductor layer over the second insulating layer;   a third conductive layer over the second semiconductor layer;   a fourth conductive layer over the second insulating layer;   a third insulating layer over the third conductive layer, the fourth conductive layer and the second insulating layer; and   a fifth conductive layer over the third insulating layer,   wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer,   wherein the first semiconductor layer serves as an active layer of a first transistor,   wherein the second semiconductor layer serves as an active layer of a second transistor, and   wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer.   
     
     
         12 . The semiconductor device according to  claim 11 ,
 wherein the first insulating layer serves as a gate insulating layer of the first transistor, and   wherein the first conductive layer serves as a gate electrode of the first transistor.   
     
     
         13 . The semiconductor device according to  claim 11 ,
 wherein the second insulating layer serves as a gate insulating layer of the second transistor, and   wherein the second conductive layer serves as a gate electrode of the second transistor.   
     
     
         14 . The semiconductor device according to  claim 11 , wherein the fifth conductive layer is electrically connected to the fourth conductive layer through a contact hole provided in the third insulating layer. 
     
     
         15 . The semiconductor device according to  claim 11 , wherein the fifth conductive layer is electrically connected to the first semiconductor layer through a contact hole provided in the first insulating layer, the second insulating layer and the third insulating layer. 
     
     
         16 . The semiconductor device according to  claim 11 , wherein the second semiconductor layer includes a microcrystalline semiconductor. 
     
     
         17 . A display device, comprising the semiconductor device according to  claim 11  and display element. 
     
     
         18 . A method for manufacturing a semiconductor device comprising:
 bonding a semiconductor substrate and an insulating substrate, the semiconductor substrate including a fragile layer;   forming a first semiconductor layer over the insulating substrate by separating the semiconductor substrate at the fragile layer;   forming a first insulating layer over the first semiconductor layer and the insulating substrate;   forming a first conductive layer and a second conductive layer over the first insulating layer;   forming a second insulating layer over the first conductive layer, the second conductive layer and the first insulating layer;   forming a second semiconductor layer over the second insulating layer; and   forming a third conductive layer over the second semiconductor layer,   wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer,   wherein the first semiconductor layer serves as an active layer of a first transistor,   wherein the second semiconductor layer serves as an active layer of a second transistor, and   wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer.   
     
     
         19 . The method for manufacturing the semiconductor device according to  claim 18 , wherein the separation is performed by a heat treatment. 
     
     
         20 . The method for manufacturing the semiconductor device according to  claim 18 ,
 wherein the first insulating layer serves as a gate insulating layer of the first transistor, and   wherein the first conductive layer serves as a gate electrode of the first transistor.   
     
     
         21 . The method for manufacturing the semiconductor device according to  claim 18 ,
 wherein the second insulating layer serves as a gate insulating layer of the second transistor, and   wherein the second conductive layer serves as a gate electrode of the second transistor.   
     
     
         22 . The method for manufacturing the semiconductor device according to  claim 18 , wherein the second semiconductor layer includes a microcrystalline semiconductor. 
     
     
         23 . A method for manufacturing a semiconductor device comprising:
 bonding a semiconductor substrate and an insulating substrate, the semiconductor substrate including a fragile layer;   forming a first semiconductor layer over the insulating substrate by separating the semiconductor substrate at the fragile layer;   forming a first insulating layer over the first semiconductor layer and the insulating substrate;   forming a first conductive layer and a second conductive layer over the first insulating layer;   forming a second insulating layer over the first conductive layer, the second conductive layer and the first insulating layer;   forming a second semiconductor layer over the second insulating layer; forming a third conductive layer over the second semiconductor layer, forming a fourth conductive layer over the second insulating layer;   forming a third insulating layer over the third conductive layer, the fourth conductive layer and the second insulating layer; and   forming a fifth conductive layer over the third insulating layer,   wherein the first conductive layer is overlapped with the first semiconductor layer, and the second conductive layer is overlapped with the second semiconductor layer,   wherein the first semiconductor layer serves as an active layer of a first transistor,   wherein the second semiconductor layer serves as an active layer of a second transistor, and   wherein a property of the first semiconductor layer is different from a property of the second semiconductor layer.   
     
     
         24 . The method for manufacturing the semiconductor device according to  claim 23 , wherein the separation is performed by a heat treatment. 
     
     
         25 . The method for manufacturing the semiconductor device according to  claim 23 ,
 wherein the first insulating layer serves as a gate insulating layer of the first transistor, and   wherein the first conductive layer serves as a gate electrode of the first transistor.   
     
     
         26 . The method for manufacturing the semiconductor device according to  claim 23 , wherein the fifth conductive layer is electrically connected to the fourth conductive layer through a contact hole provided in the third insulating layer. 
     
     
         27 . The method for manufacturing the semiconductor device according to  claim 23 , wherein the fifth conductive layer is electrically connected to the first semiconductor layer through a contact hole provided in the first insulating layer, the second insulating layer and the third insulating layer. 
     
     
         28 . The method for manufacturing the semiconductor device according to  claim 23 , wherein the second semiconductor layer includes a microcrystalline semiconductor.

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