Semiconductor device

Abstract

It is an object to provide a semiconductor device which has a large size and operates at high speed. A top gate transistor which includes a semiconductor layer of single-crystal and a bottom gate transistor which includes a semiconductor layer of amorphous silicon (microcrystalline silicon) are formed over the same substrate. Then, gate electrodes of each transistor are formed with the same layer, and source and drain electrodes are also formed with the same layer. Thus, manufacturing steps are reduced. In other words, two types of transistors can be manufactured by adding only a few steps to the manufacturing process of a bottom gate transistor.

1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a flexible substrate;   a first insulating layer over the flexible substrate;   a first semiconductor layer over and in contact with the first insulating layer;   a second insulating layer over and in contact with the first semiconductor layer;   a first conductive layer over the second insulating layer functioning as a first gate electrode of a first transistor;   a second conductive layer over the second insulating layer and the first semiconductor layer functioning as a second gate electrode of a second transistor;   a third insulating layer over the first conductive layer and the second conductive layer;   a second semiconductor layer over the third insulating layer;   a third conductive layer over and in contact with a top surface of the second semiconductor layer, the third conductive layer functioning as one of a source electrode and a drain electrode of the second transistor;   a fourth conductive layer over and in contact with the top surface of the second semiconductor layer, the fourth conductive layer functioning as the other of the source electrode and the drain electrode of the second transistor;   a fourth insulating layer over the third conductive layer and the fourth conductive layer; and   a fifth conductive layer over the fourth insulating layer,   wherein, in a cross-sectional view, the first semiconductor layer and the second semiconductor layer do not overlap with each other, and   wherein the first semiconductor layer and the second semiconductor layer have different characteristics.   
     
     
         3 . A semiconductor device comprising:
 a flexible substrate;   a first insulating layer over the flexible substrate;   a first semiconductor layer over and in contact with the first insulating layer;   a second insulating layer over and in contact with the first semiconductor layer;   a first conductive layer over the second insulating layer functioning as a first gate electrode of a first transistor;   a second conductive layer over the second insulating layer and the first semiconductor layer functioning as a second gate electrode of a second transistor;   a third insulating layer over the first conductive layer and the second conductive layer;   a second semiconductor layer over the third insulating layer;   a third conductive layer over and in contact with a top surface of the second semiconductor layer, the third conductive layer functioning as one of a source electrode and a drain electrode of the second transistor; and   a fourth insulating layer over and in contact with the second semiconductor layer,   wherein the fourth insulating layer is in contact with side surfaces of the third conductive layer,   wherein, in a cross-sectional view, the first semiconductor layer and the second semiconductor layer do not overlap with each other, and   wherein the first semiconductor layer and the second semiconductor layer have different characteristics.   
     
     
         4 . A semiconductor device comprising:
 a flexible substrate;   a first insulating layer over the flexible substrate;   a first semiconductor layer over and in contact with the first insulating layer;   a second insulating layer over and in contact with the first semiconductor layer;   a first conductive layer over the second insulating layer functioning as a first gate electrode of a first transistor;   a second conductive layer over the second insulating layer and the first semiconductor layer functioning as a second gate electrode of a second transistor;   a third insulating layer over the first conductive layer and the second conductive layer;   a second semiconductor layer over the third insulating layer;   a third conductive layer over and in contact with a top surface of the second semiconductor layer, the third conductive layer functioning as one of a source electrode and a drain electrode of the second transistor; and   a fourth insulating layer over and in contact with the second semiconductor layer,   wherein the fourth insulating layer comprises a plurality of openings,   wherein a fourth conductive layer is electrically connected to the second semiconductor layer via one of the plurality of openings,   wherein, in a cross-sectional view, the first semiconductor layer and the second semiconductor layer do not overlap with each other, and   wherein the first semiconductor layer and the second semiconductor layer have different characteristics.   
     
     
         5 . The semiconductor device according to  claim 2 , wherein the fourth insulating layer serves as a dielectric of a capacitor. 
     
     
         6 . The semiconductor device according to  claim 2 , further comprising a light-emitting element. 
     
     
         7 . The semiconductor device according to  claim 3 , further comprising a light-emitting element. 
     
     
         8 . The semiconductor device according to  claim 4 , further comprising a light-emitting element. 
     
     
         9 . The semiconductor device according to  claim 2 , wherein the third insulating layer comprises a plurality of openings. 
     
     
         10 . The semiconductor device according to  claim 3 , wherein the third insulating layer comprises a plurality of openings. 
     
     
         11 . The semiconductor device according to  claim 4 , wherein the third insulating layer comprises a plurality of openings. 
     
     
         12 . The semiconductor device according to  claim 3 , wherein a fourth conductive layer is electrically connected to the first semiconductor layer via an opening provided in the second insulating layer, an opening provided in the third insulating layer, and openings provided in the fourth insulating layer. 
     
     
         13 . The semiconductor device according to  claim 4 , wherein a fifth conductive layer is electrically connected to the first semiconductor layer via an opening provided in the second insulating layer, an opening provided in the third insulating layer, and two of the plurality of openings provided in the fourth insulating layer. 
     
     
         14 . The semiconductor device according to  claim 3 , wherein a bottom surface of the fourth insulating layer is substantially aligned with a bottom surface of the second semiconductor layer. 
     
     
         15 . The semiconductor device according to  claim 3 , wherein a bottom surface of the third conductive layer is provided below a top surface of the first gate electrode. 
     
     
         16 . The semiconductor device according to  claim 3 , further comprising:
 a fourth conductive layer over the fourth insulating layer and overlapping with the second conductive layer and the second semiconductor layer; and   a fifth conductive layer over the fourth insulating layer and overlapping with the first semiconductor layer.