Semiconductor structure and manufacturing method thereof

Abstract

The present disclosure provides a semiconductor structure and a method for preparing the semiconductor structure. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first semiconductor substrate, a first conductive pad and a second conductive pad. The first conductive pad is disposed on the first semiconductor substrate. The second conductive pad is disposed on the first conductive pad. The second semiconductor device is disposed on the first semiconductor device and comprises a second semiconductor substrate and a via structure. The via structure is disposed in the second semiconductor substrate and contacts the second conductive pad. Chemical reactivity of the second conductive pad is less than chemical reactivity of the first conductive pad.

1 . A semiconductor structure, comprising:
 a first semiconductor device, comprising:
 a first semiconductor substrate; 
 a first conductive pad, disposed on the first semiconductor substrate; and 
 a second conductive pad, disposed on the first conductive pad; and 
 a second semiconductor device, disposed on the first semiconductor device, comprising: 
   a second semiconductor substrate; and
 a via structure, disposed in the second semiconductor substrate and contacting the second conductive pad; 
   wherein chemical reactivity of the second conductive pad is less than chemical reactivity of the first conductive pad, wherein the second conductive pad comprises gold (Au), silver (Ag), or a combination thereof.   
     
     
         2 . The semiconductor structure of  claim 1 , wherein a thickness of the second conductive pad is less than a thickness of the first conductive pad. 
     
     
         3 . The semiconductor structure of  claim 1 , wherein the first conductive pad comprises copper (Cu), aluminum (Al), or a combination thereof. 
     
     
         4 . (canceled) 
     
     
         5 . The semiconductor structure of  claim 1 , wherein an upper surface of the second conductive pad is substantially coplanar with an upper surface of the first semiconductor device. 
     
     
         6 . The semiconductor structure of  claim 1 , wherein the via structure is a through silicon via (TSV). 
     
     
         7 . A semiconductor structure, comprising:
 a first chip, comprising:
 a first semiconductor substrate; and 
 a conductive pad, disposed on the first semiconductor substrate; and 
 a second chip, comprising: 
 a second substrate; and 
 a via structure, disposed in the second semiconductor substrate and contacting the conductive pad; 
   wherein chemical reactivity of the conductive pad increases at positions along a direction from the via structure to the first semiconductor substrate, wherein the conductive pad comprises a first portion and a second portion, wherein the second portion is located between the first portion and the via structure, and the second portion comprises gold (Au), silver (Ag), or a combination thereof.   
     
     
         8 . (canceled) 
     
     
         9 . The semiconductor structure of  claim 7 , wherein a thickness of the second portion is less than a thickness of the first portion. 
     
     
         10 . The semiconductor structure of  claim 7 , wherein the first portion and the second portion are formed of different metal materials. 
     
     
         11 . The semiconductor structure of  claim 7 , wherein chemical reactivity of the second portion is less than chemical reactivity of the first portion. 
     
     
         12 . The semiconductor structure of  claim 7 , wherein the conductive pad comprises a step structure, and a step height of the step structure is less than 1 μm. 
     
     
         13 . The semiconductor structure of  claim 7 , wherein an aspect ratio of the via structure is less than 10:1. 
     
     
         14 - 20 . (canceled)