Semiconductor device and manufacturing method
Abstract
To provide a semiconductor device that has barrier metal and has a small variation in a threshold voltage. A semiconductor device is provided, including a semiconductor substrate, an interlayer dielectric film arranged on an upper surface of the semiconductor substrate, a titanium layer provided on the interlayer dielectric film, and a titanium nitride layer provided on the titanium layer, where the interlayer dielectric film is provided with an opening that exposes a part of the upper surface of the semiconductor substrate, the titanium layer and the titanium nitride layer are also provided within the opening, and the titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening is entirely titanium-silicided.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A manufacturing method comprising
forming an interlayer dielectric film on an upper surface of a semiconductor substrate; forming an opening in the interlayer dielectric film, the opening exposing a part of the upper surface of the semiconductor substrate; forming a titanium layer on the interlayer dielectric film and in the opening; forming a titanium nitride layer on the titanium layer; and titanium siliciding, the entire titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening.
2 . The manufacturing method according to claim 1 , wherein
the titanium siliciding includes annealing the semiconductor substrate at 700° C. or higher.
3 . The manufacturing method according to claim 1 , further comprising forming a tungsten plug on the titanium nitride layer that is in the opening, wherein
an annealing temperature for the semiconductor substrate in the titanium siliciding is higher than a temperature at which a tungsten film is formed in the forming a tungsten plug.
4 . The manufacturing method according to claim 1 , further comprising hydrogen annealing, that is, annealing on the semiconductor substrate in hydrogen-containing atmosphere before the forming a titanium layer, wherein
an annealing temperature for the semiconductor substrate in the titanium siliciding is higher than an annealing temperature in the hydrogen annealing.
5 . A manufacturing method comprising
forming an interlayer dielectric film on an upper surface of a semiconductor substrate; forming an opening in the interlayer dielectric film, the opening exposing a part of the upper surface of the semiconductor substrate; forming a titanium layer of 30 nm or larger and 45 nm or smaller on the interlayer dielectric film and in the opening; forming a titanium nitride layer on the titanium layer; and titanium siliciding, the entire titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening.
6 . The manufacturing method according to claim 5 , wherein
the titanium siliciding includes annealing the semiconductor substrate at 700° C. or higher.
7 . The manufacturing method according to claim 5 , further comprising forming a tungsten plug on the titanium nitride layer that is in the opening, wherein
an annealing temperature for the semiconductor substrate in the titanium siliciding is higher than a temperature at which a tungsten film is formed in the forming a tungsten plug.
8 . The manufacturing method according to claim 5 , further comprising hydrogen annealing, that is, annealing on the semiconductor substrate in hydrogen-containing atmosphere before the forming a titanium layer, wherein
an annealing temperature for the semiconductor substrate in the titanium siliciding is higher than an annealing temperature in the hydrogen annealing.Join the waitlist — get patent alerts
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