US2022083329A1PendingUtilityA1

Integrated single fpga and solid state disk controller

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Mar 9, 2018Filed: Nov 23, 2021Published: Mar 17, 2022
Est. expiryMar 9, 2038(~11.6 yrs left)· nominal 20-yr term from priority
G06F 8/654G06F 8/65G06F 3/0658
64
PatentIndex Score
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Cited by
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Claims

Abstract

A system and method for updating storage system includes a solid state disk (SSD) attached to a FPGA. The solid state disk is configured to receive a firmware image and a firmware upgrade module operating on the FPGA is configured to identify the presence of the firmware image on the SSD. The firmware upgrade module is further configured to store the firmware image in a buffer on the FPGA and write the firmware image.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A storage device comprising:
 a solid state disk (SSD) comprising flash chips;   a field programmable gate array (FPGA) comprising logic blocks and interconnects configured in accordance with a register transfer level (RTL) firmware to implement:
 a host manager providing an interface for controlling operation of the FPGA and access to the SSD; 
 a flash controller managing input of data to the flash chips and output of data from the flash chips; and 
 a firmware upgrade module configured to:
 identify a presence of an updated firmware image stored in the SSD; 
 determine that the updated firmware image comprises an RTL firmware image; and 
 update the RTL firmware of the FPGA based on the RTL firmware image. 
 
   
     
     
         22 . The storage device of  claim 21 , wherein the update of the RTL firmware of the FPGA updates an implementation of the host manager. 
     
     
         23 . The storage device of  claim 21 , wherein the update of the RTL firmware of the FPGA updates an implementation of the flash controller. 
     
     
         24 . The storage device of  claim 21 , wherein the RTL firmware further implements a FPGA acceleration engine between the host manager and the flash controller. 
     
     
         25 . The storage device of  claim 24 , wherein the update of the RTL firmware of the FPGA updates an implementation of the FPGA acceleration engine. 
     
     
         26 . The storage device of  claim 21 , wherein the FPGA further comprises a processor comprising a processing core, and
 wherein the processor is configured by a processor firmware stored in a processor firmware storage connected to the FPGA.   
     
     
         27 . The storage device of  claim 26 , wherein the firmware upgrade module is further configured to:
 determine that the updated firmware image includes a processor firmware image; and   flash the processor firmware image to the processor firmware storage.   
     
     
         28 . The storage device of  claim 27 , wherein the firmware upgrade module is further configured to: store the processor firmware image in a processor firmware buffer of the FPGA. 
     
     
         29 . The storage device of  claim 28 , wherein the firmware upgrade module is further configured to:
 receive a commit command; and   write the RTL firmware image to an FPGA logic of the FPGA according to the commit command.   
     
     
         30 . The storage device of  claim 29 , wherein the firmware upgrade module is further configured to write the processor firmware image to the processor firmware buffer according to the commit command. 
     
     
         31 . The storage device of  claim 21 , wherein the firmware upgrade module is further configured to
 store the RTL firmware image in an RTL firmware buffer of the FPGA.   
     
     
         32 . The storage device of  claim 21 , wherein the firmware upgrade module is further configured to:
 receive a commit command; and   write the RTL firmware image to an FPGA logic of the FPGA according to the commit command.   
     
     
         33 . A method for updating a storage system comprising:
 receiving an updated firmware image at a storage device comprising: a solid state disk (SSD) comprising flash chips; and a field programmable gate array (FPGA) comprising logic blocks and interconnects configured in accordance with a register transfer level (RTL) firmware, the logic blocks and interconnects being configured in accordance with the RTL firmware to implement: a host manager providing an interface for controlling operation of the FPGA and access to the SSD; and a flash controller managing input of data to the flash chips and output of data from the flash chips;   identifying, by a firmware upgrade module implemented in the FPGA according to the RTL firmware, the updated firmware image in the storage device;   determining, by the firmware upgrade module, that the updated firmware image comprises an RTL firmware image; and   updating, by the firmware upgrade module, the RTL firmware of the FPGA based on the RTL firmware image.   
     
     
         34 . The method of  claim 33 , wherein the updating of the RTL firmware of the FPGA updates an implementation of the host manager. 
     
     
         35 . The method of  claim 33 , wherein the updating of the RTL firmware of the FPGA updates an implementation of the flash controller. 
     
     
         36 . The method of  claim 33 , wherein the RTL firmware further implements a FPGA acceleration engine between the host manager and the flash controller, and
 wherein the updating the RTL firmware of the FPGA updates an implementation of the FPGA acceleration engine.   
     
     
         37 . The method of  claim 33 , wherein the FPGA further comprises a processor comprising a processing core, and
 wherein the processor is configured by a processor firmware stored in a processor firmware storage connected to the FPGA.   
     
     
         38 . The method of  claim 37 , further comprising:
 determining that the updated firmware image includes a processor firmware image; and   writing the processor firmware image to the processor firmware storage.   
     
     
         39 . The method of  claim 38 , further comprising:
 receiving a commit command; and   writing the RTL firmware image to an FPGA logic of the FPGA according to the commit command.   
     
     
         40 . The method of  claim 39 , wherein the writing the processor firmware image to the processor firmware storage is performed according to the commit command.

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