US2022058470A1PendingUtilityA1

Synapse array of a neuromorphic device including a synapse array having a plurality of ferroelectricity field effect transistors

Assignee: SK HYNIX INCPriority: Jun 5, 2017Filed: Nov 4, 2021Published: Feb 24, 2022
Est. expiryJun 5, 2037(~10.8 yrs left)· nominal 20-yr term from priority
Inventors:Hyung-Dong Lee
H10D 30/701H10D 30/0411H10D 30/0415H10D 30/68G06N 3/04G06N 3/0499H10D 64/519H10D 64/514H10D 64/689H10D 64/033G06N 3/049G06N 3/063H01L 29/516H01L 27/11587H01L 27/1159H01L 29/6684H01L 29/40111H01L 27/1156H01L 27/11521H01L 29/78391H10B 51/10H10B 41/70H10B 51/20H10B 51/30H10B 51/00H10B 41/30Y02D10/00
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Claims

Abstract

A synapse array of a neuromorphic device comprises a first input neuron, a second input neuron, an output neuron, and a synapse. The synapse comprises a plurality of pairs of ferroelectric field effect transistors electrically connected to each other in parallel, each of the plurality of pairs of ferroelectric field effect transistors comprises a first ferroelectric field effect transistor and a second ferroelectric field effect transistor, and the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other in series.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A synapse array of a neuromorphic device comprising:
 a first input neuron;   a second input neuron;   an output neuron; and   a synapse,   wherein the synapse comprises a plurality of pairs of ferroelectric field effect transistors electrically connected to each other in parallel,   wherein each of the plurality of pairs of ferroelectric field effect transistors comprises a first ferroelectric field effect transistor and a second ferroelectric field effect transistor, and   wherein the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other in series.   
     
     
         2 . The synapse array of the neuromorphic device of  claim 1 ,
 wherein the first ferroelectric field effect transistor includes a drain electrode electrically connected to the first input neuron.   
     
     
         3 . The synapse array of the neuromorphic device of  claim 2 ,
 wherein the first ferroelectric field effect transistor includes a source electrode electrically connected to the output neuron.   
     
     
         4 . The synapse array of the neuromorphic device of  claim 3 ,
 wherein the first ferroelectric field effect transistor includes a body electrically connected to the source electrode of the first ferroelectric field effect transistor.   
     
     
         5 . The synapse array of the neuromorphic device of  claim 1 ,
 wherein the second ferroelectric field effect transistor includes a source electrode electrically connected to the second input neuron.   
     
     
         6 . The synapse array of the neuromorphic device of  claim 5 ,
 wherein the second ferroelectric field effect transistor includes a drain electrode electrically connected to the output neuron.   
     
     
         7 . The synapse array of the neuromorphic device of  claim 6 ,
 wherein the second ferroelectric field effect transistor includes a body electrically connected to the drain electrode of the second ferroelectric field effect transistor.   
     
     
         8 . The synapse array of the neuromorphic device of  claim 1 ,
 wherein the first ferroelectric field effect transistor includes a first gate electrode and the second field effect transistor includes a second gate electrode, and   wherein the first gate electrode and the second gate electrode are electrically connected to a common gating controller.   
     
     
         9 . The synapse array of the neuromorphic device of  claim 1 ,
 wherein the first ferroelectric field effect transistor comprises an n-type ferroelectric field effect transistor, and   wherein the second ferroelectric field effect transistor comprises a p-type ferroelectric field effect transistor.   
     
     
         10 . The synapse array of the neuromorphic device of  claim 1 ,
 wherein the first input neuron provides a first reference voltage to the synapse, and the second input neuron provides a second reference voltage to the synapse, and   wherein the first reference voltage is greater than the second reference voltage.

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