Memory Systems and Memory Control Methods

Abstract

Memory systems and memory control methods are described. According to one aspect, a memory system includes a plurality of memory cells individually configured to store data, program memory configured to store a plurality of first executable instructions which are ordered according to a first instruction sequence and a plurality of second executable instructions which are ordered according to a second instruction sequence, substitution circuitry configured to replace one of the first executable instructions with a substitute executable instruction, and a control unit configured to execute the first and second executable instructions to control reading and writing of the data with respect to the memory, wherein the control unit is configured to execute the first executable instructions according to the first instruction sequence, to execute the substitute executable instruction after the execution of the first executable instructions, and to execute the second executable instructions according to the second instruction sequence as a result of execution of the substitute executable instruction.

1 . A memory system comprising:
 a plurality of memory cells individually configured to store data;   program memory configured to store a plurality of first executable instructions which are ordered according to a first instruction sequence and a plurality of second executable instructions which are ordered according to a second instruction sequence;   substitution circuitry configured to replace one of the first executable instructions with a substitute executable instruction; and   a control unit configured to execute the first executable instructions to implement at least one operation with respect to the storage of the data using the memory cells, wherein the control unit is configured to execute the first executable instructions according to the first instruction sequence, to execute the substitute executable instruction after the execution of the first executable instructions, and to execute the second executable instructions according to the second instruction sequence as a result of the execution of the substitute executable instruction.   
     
     
         2 . The system of  claim 1  further comprising a program counter configured to generate a plurality of program counter values to fetch the first and second executable instructions 
     
     
         3 . The system of  claim 2  wherein the substitution circuitry is configured to replace the one first executable instruction with the substitute executable instruction as a result of the program counter generating a predefined one of the program counter values. 
     
     
         4 . The system of  claim 2  wherein the substitution circuitry is configured to control the program counter to replace one of the program counter values with a substitute program counter value as a result of the program counter generating a predefined one of the program counter values. 
     
     
         5 . The system of  claim 2  wherein the program counter values comprise a plurality of first program counter values to fetch the first executable instructions according to the first instruction sequence and wherein the substitution circuitry is configured to control the program counter to replace one of the first program counter values with one of a plurality of second program counter values to initiate fetching of the second executable instructions. 
     
     
         6 . The system of  claim 1  wherein the substitute executable instruction is a branch instruction configured to control the control unit to begin execution of the second executable instructions. 
     
     
         7 . The system of  claim 1  further comprising an input configured to receive the second executable instructions from externally of the memory system and to transfer the second executable instructions to the program memory. 
     
     
         8 . The system of  claim 1  wherein some of the memory cells store the second executable instructions and the program memory receives the second executable instructions from the some memory cells. 
     
     
         9 . The system of  claim 1  wherein the control unit comprises an instruction register, and wherein the substitution circuitry is configured to control provision of the substitute executable instruction to the instruction register to replace the one first executable instruction. 
     
     
         10 . The system of  claim 1  wherein the first executable instructions are stored in non-volatile memory and the second executable instructions are stored in volatile memory. 
     
     
         11 . The system of  claim 10  wherein the first and second executable instructions are stored within a continuous instruction set address space of the non-volatile memory and the volatile memory. 
     
     
         12 . The system of  claim 1  wherein the control unit is configured to test the execution of the first executable instructions during the execution of the second executable instructions. 
     
     
         13 . A memory system comprising:
 a plurality of memory cells individually configured to store data;   a control unit configured to control reading and writing of the data with respect to the memory cells;   program memory configured to store a plurality of first executable instructions which are ordered according to a first instruction sequence and to store a plurality of second executable instructions which are ordered according to a second instruction sequence;   a program counter configured to generate a plurality of first program counter values to fetch the first executable instructions according to the first instruction sequence and to generate a plurality of second program counter values to fetch the second executable instructions according to the second instruction sequence;   substitution circuitry configured to replace one of the first program counter values with one of the second program counter values to initiate the fetching of the second executable instructions; and   wherein the control unit is configured to execute the first executable instructions to implement at least one operation with respect to the storage of the data using the memory cells.   
     
     
         14 . The system of  claim 13  wherein the substitution circuitry is configured to replace one of the first executable instructions with a branch instruction configured to control the control unit to initiate execution of the second executable instructions. 
     
     
         15 . The system of  claim 13  wherein the substitution circuitry is configured to replace the one first program counter value with the one second program counter value as a result of the program counter generating a predefined first program counter value. 
     
     
         16 . The system of  claim 13  wherein the first executable instructions are stored in non-volatile memory and the second executable instructions are stored in volatile memory. 
     
     
         17 . The system of  claim 16  wherein the first and second executable instructions are stored within a continuous instruction set address space of the non-volatile memory and the volatile memory. 
     
     
         18 . A memory system comprising:
 a plurality of memory cells individually configured to store data;   a first storage space configured to store a plurality of first executable instructions of a first instruction sequence;   a second storage space configured to store a plurality of second executable instructions of a second instruction sequence;   a control unit configured to execute the first executable instructions to implement at least one operation with respect to storage of the data using the memory cells; and   logic circuitry configured to detect a predefined event during the execution of the first executable instructions by the control unit and to control the control unit to execute the second executable instructions as a result of the detection.   
     
     
         19 . The system of  claim 18  wherein the first storage space is non-volatile memory and the second storage space is volatile memory. 
     
     
         20 . The system of  claim 18  wherein the first and second executable instructions are stored within a continuous instruction set address space of the first and second storage spaces. 
     
     
         21 - 38 . (canceled)