Semiconductor device and manufacturing method

Abstract

A semiconductor device including a semiconductor substrate; a trench formed in a front surface of the semiconductor substrate; a gate conducting portion formed within the gate trench; and a first region formed adjacent to the trench in the front surface of the semiconductor substrate and having a higher impurity concentration than the semiconductor substrate. A shoulder portion is provided on a side wall of the gate trench between the top end of the gate conducting portion and the front surface of the semiconductor substrate and has an average slope, relative to a depth direction of the semiconductor substrate, that is greater than a slope of the side wall of the gate trench at a position opposite the top end of the gate conducting portion, and a portion of the first region that contacts the gate trench is formed as a deepest portion thereof

What is claimed is: 
     
         1 . A semiconductor device including a first semiconductor region with a second conductivity type formed on a side of a front surface of a semiconductor substrate with a first conductivity type and a second semiconductor region with the first conductivity type selectively formed on closer to a portion of the side of the front surface than the first semiconductor region, the semiconductor device comprising:
 a plurality of trenches extending in a predetermined extension direction in the side of the front surface of the semiconductor substrate and reaching below the first semiconductor region;   a conducting portion filled within the plurality of trenches;   an interlayer insulating film covering the front surface of the front surface of the semiconductor substrate with a prescribed pattern;   a first electrode connecting to the semiconductor substrate via a region exposed from the interlayer insulating film in a mesa region sandwiched between the trenches, wherein   in a cross section perpendicular to the extension direction, a first trench portion and a second trench portion are provided, the first trench portion having a predetermined distance from the front surface of the semiconductor substrate to a deepest portion on a surface of the conducting portion, and the second trench portion having a predetermined distance from the front surface of the semiconductor substrate to a deepest portion on the surface of the conducting portion, and   each of the trenches in the first trench portion and the second trench portion includes, on a top end, a shoulder portion having a slope toward the exposed region, greater than a slope of a side wall of the trench.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the first electrode includes an emitter electrode.   
     
     
         3 . The semiconductor device according to  claim 2 , further comprising:
 a first contact region with the second conductivity type, having a higher impurity concentration than the first semiconductor region and selectively formed on closer to a portion of the side of the front surface than the first semiconductor region.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein
 the first electrode includes an emitter electrode and a plug arranged between the semiconductor substrate and the emitter electrode.   
     
     
         5 . The semiconductor device according to  claim 4 , further comprising:
 a second contact region with the second conductivity type, having a higher impurity concentration than the first semiconductor region and arranged below the plug.   
     
     
         6 . The semiconductor device according to  claim 5 , wherein
 a bottom end of the plug is provided at a deeper position than a bottom end of the second semiconductor region.   
     
     
         7 . The semiconductor device according to  claim 4 , further comprising:
 an accumulation region with the first conductivity type, formed below the first semiconductor region and having a higher impurity concentration than the semiconductor substrate.   
     
     
         8 . The semiconductor device according to  claim 3 , wherein
 the first semiconductor region is a base region.   
     
     
         9 . The semiconductor device according to  claim 8 , wherein
 the second semiconductor region is an emitter region.   
     
     
         10 . The semiconductor device according to  claim 9 , wherein
 the emitter region is formed such that a side thereof adjacent to the trench is relatively long.   
     
     
         11 . The semiconductor device according to  claim 9 , wherein
 the emitter region is arranged in a mesa region sandwiched between the first trench portion and the second trench portion in the cross section perpendicular to the extension direction, and   the emitter region is not arranged symmetrically regarding a side of the first trench portion and a side of the second trench portion.   
     
     
         12 . The semiconductor device according to  claim 11 , wherein
 the emitter region has different depths at the side of the first trench portion and the side of the second trench portion.   
     
     
         13 . The semiconductor device according to  claim 9 , wherein
 the deepest portion on the surface of the conducting portion in the first trench portion or the second trench portion is arranged at a center of the trench in the cross section perpendicular to the extension direction.   
     
     
         14 . The semiconductor device according to  claim 9 , wherein
 a side of the side wall on the surface of the conducting portion in the first trench portion or the second trench portion is relatively close to the front surface of the semiconductor substrate in the cross section perpendicular to the extension direction.   
     
     
         15 . The semiconductor device according to  claim 14 , wherein
 the cross section perpendicular to the extension direction passes through the second semiconductor region.   
     
     
         16 . The semiconductor device according to  claim 15 , wherein
 the conducting portion is formed of a polysilicon.   
     
     
         17 . The semiconductor device according to  claim 16 , further comprising:
 an insulating film covering an inner wall of the trench to provide insulation between the semiconductor substrate and the conducting portion.   
     
     
         18 . The semiconductor device according to  claim 17 , wherein
 a part of the conducting portion is connected to a gate electrode, and   at least a portion of the other part of the conducting portion is connected to the emitter electrode.   
     
     
         19 . The semiconductor device according to  claim 18 , wherein
 the shoulder portion has an average slope that is greater than a slope of the side wall, relative to a depth direction of the semiconductor substrate.   
     
     
         20 . The semiconductor device according to  claim 19 , wherein
 the shoulder portion has a linear shape in at least a portion thereof.   
     
     
         21 . The semiconductor device according to  claim 19  wherein
 a length D 1  of the shoulder portion in a depth direction of the semiconductor substrate is greater than a width W 1  in a direction perpendicular to the extension direction. 
 
     
     
         22 . The semiconductor device according to  claim 21 , wherein
 the width W 1  of the shoulder portion is greater than or equal to 1/20 and is less than or equal to ½, of a width of the trench at a position opposite a top end of the conducting portion.   
     
     
         23 . The semiconductor device according to  claim 22 , wherein
 the width W 1  of the shoulder portion is less than or equal to ¼ of the width of the trench at the position opposite the top end of the conducting portion.   
     
     
         24 . The semiconductor device according to  claim 22 , wherein
 the width W 1  of the shoulder portion is greater than or equal to 1/10 of the width of the trench at the position opposite the top end of the conducting portion.   
     
     
         25 . The semiconductor device according to  claim 22 , wherein
 at least a part of the shoulder portion has a slope greater than or equal to 20 degrees in a depth direction of the semiconductor substrate.   
     
     
         26 . The semiconductor device according to  claim 22 , wherein
 a top end of each of the conducting parts in the first trench portion and the second trench portion is arranged at a position deeper than the front surface of the semiconductor substrate.