Semiconductor device, solid-state imaging device, and electronic equipment

Abstract

The present technology relates to a semiconductor device, a solid-state imaging device, and electronic equipment, which are able to suppress increase of resistivity to a high level at a connection portion between an ESV and a wiring layer and to improve reliability of an electric connection using an ESV.The semiconductor device according to a first aspect of the present technology has a plurality of semiconductor substrates layered, and includes: a through electrode penetrating a silicon layer of the semiconductor substrates; a wiring layer formed inside the semiconductor substrates; and a through electrode reception part connected to the wiring layer, in which the through electrode has a width smaller than the through electrode reception part, and the through electrode is electrically connected to the wiring layer via the through electrode reception part. The present technology is applicable, for example, to a CMOS image sensor.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first section including a first semiconductor substrate and a first wiring layer;   a second section including a second semiconductor substrate, a second wiring layer, a third wiring layer, and a through electrode, wherein the through electrode penetrates through the second semiconductor substrate; and   a third section including a third semiconductor substrate and a fourth wiring layer, wherein
 the first section, the second section and the third section are stacked such that the first wiring layer faces the second wiring layer, and the third wiring layer faces the fourth wiring layer, 
 the first section is electrically connected to the second section via a first connection portion, 
 the second section is electrically connected to the third section via a second connection portion, and 
 the second wiring layer is electrically connected to the third wiring layer via the through electrode. 
   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the first section includes a sensor circuit, a floating diffusion, and a pixel transistor. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the second section includes a memory circuit. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the third section includes a logic circuit. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the first section, the second section, and the third section are bonded by Cu—Cu connection. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the second section further includes a TSV penetrating through the second semiconductor substrate. 
     
     
         7 . A solid-state imaging device, comprising:
 a first section including a first semiconductor substrate and a first wiring layer;   a second section including a second semiconductor substrate, a second wiring layer, a third wiring layer, and a through electrode, wherein the through electrode penetrates through the second semiconductor substrate; and   a third section including a third semiconductor substrate and a fourth wiring layer, wherein
 the first section, the second section and the third section are stacked such that the first wiring layer faces the second wiring layer, and the third wiring layer faces the fourth wiring layer, 
 the first section is electrically connected to the second section via a first connection portion, 
 the second section is electrically connected to the third section via a second connection portion, and 
 the second wiring layer is electrically connected to the third wiring layer via the through electrode. 
   
     
     
         8 . An electronic apparatus, comprising:
 a first section including a first semiconductor substrate and a first wiring layer;   a second section including a second semiconductor substrate, a second wiring layer, a third wiring layer, and a through electrode, wherein the through electrode penetrates through the second semiconductor substrate; and   a third section including a third semiconductor substrate and a fourth wiring layer, wherein
 the first section, the second section and the third section are stacked such that the first wiring layer faces the second wiring layer, and the third wiring layer faces the fourth wiring layer, 
 the first section is electrically connected to the second section via a first connection portion, 
 the second section is electrically connected to the third section via a second connection portion, and 
 the second wiring layer is electrically connected to the third wiring layer via the through electrode. 
   
     
     
         9 . An imaging device, comprising:
 a first section including a first semiconductor substrate and a first wiring layer;   a second section including a second semiconductor substrate, a second wiring layer, a third wiring layer, and a through electrode, wherein the through electrode penetrates through the second semiconductor substrate; and   a third section including a third semiconductor substrate and a fourth wiring layer, wherein
 the first section, the second section and the third section are stacked such that the first wiring layer faces the second wiring layer, and the third wiring layer faces the fourth wiring layer, 
 the first section is electrically connected to the second section via a first connection portion, 
 the second section is electrically connected to the third section via a second connection portion, and 
 the second wiring layer is electrically connected to the third wiring layer via the through electrode.