Semiconductor device and method of manufacturing the same
Abstract
A semiconductor device with an insulated-gate field-effect transistor and its manufacturing method. The cell region EFR defined in the first region of one main surface side of semiconductor substrate (SUB), an insulated gate-type field-effect transistor (MFET) is formed, the gate pad region GPR defined in the first region, snubber circuit SNC is formed snubber region SNR is defined. Within the first and second regions, first and second deep trenches spaced apart from each other are formed, and at least one width of the plurality of second deep trenches formed in the second region is smaller than that of the first deep trench formed in the first region.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of manufacturing a semiconductor device comprising:
a step of providing a first main surface, and a second main surface opposite to the first main surface, forming an insulated gate type field effect transistor in the first region of semiconductor substrate, a step of forming a snubber circuit having a resistance and a capacitor in a second region other than the first region, in the first region and the second region, wherein the step includes a step of forming a plurality of first deep trenches and a plurality of second deep trenches toward semiconductor substrate, wherein among the plurality of second deep trenches formed in the second region, the second width of at least one of the first deep trenches is less than the width of at least one of the first deep trenches
2 . The method of manufacturing a semiconductor device according to claim 1 ,
the step of forming the element includes: a step of forming a first diffusion layer of the first conductivity type electrically connected to semiconductor substrate, a step of forming a second conductivity type second diffusion layer, wherein over a shallow position of the first main surface side than the first diffusion layer, the second conductivity type second diffusion layer becomes an insulated gate type field-effect transistor channel in the first region, and becomes the resistor of the snubber circuit and a capacitor with bonding to the first diffusion layer in the second region.
3 . The method of manufacturing a semiconductor device according to claim 1 ,
wherein the plurality of second deep trenches are formed with a width of 0.5 μm or greater and less than 0.7 μm in a plane view.Join the waitlist — get patent alerts
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