Liquid crystal display device and electronic device including the same

Abstract

A driver circuit includes a circuit 200, a transistor 101_1, and a transistor 101_2. A signal is selectively input from the circuit 200 to a gate of the transistor 101_1 and the transistor 101_2, so that the transistor 101_1 and the transistor 101_2 are controlled to be on or off. The transistor 101_1 and the transistor 101_2 are turned on or off; thus, the wiring 112 and the wiring 111 become conducting or non-conducting.

1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor,   wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, and a first wiring,   wherein a gate of the first transistor is electrically connected to one of a source and a drain of the fifth transistor,   wherein a gate of the fourth transistor is electrically connected to a gate of the fifth transistor, one of a source and a drain of the sixth transistor, one of a source and a drain of the seventh transistor, and one of a source and a drain of the tenth transistor,   wherein a gate of the sixth transistor is electrically connected to one of a source and a drain of the eighth transistor and one of a source and a drain of the ninth transistor,   wherein the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the tenth transistor and a second wiring,   wherein the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the seventh transistor,   wherein the other of the source and the drain of the eighth transistor is electrically connected to a third wiring,   wherein the gate of the first transistor is electrically connected to one of a source and a drain of the eleventh transistor,   wherein the other of the source and the drain of the eleventh transistor is electrically connected to one of a source and a drain of the twelfth transistor and one of a source and a drain of the thirteenth transistor,   wherein the first wiring is a gate signal line,   wherein the second wiring is a power line, and   wherein the third wiring is a clock signal line.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein a channel formation region of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, and the thirteenth transistor comprises polycrystalline silicon.