Methods and apparatus to manage heat in a central processing unit

Abstract

Methods, apparatus, systems, and articles of manufacture to manage heat in a CPU are disclosed. An example apparatus includes a metric collection agent to output a metric representative of a property of the central processor unit including a first core and a second physical core, the first physical core and the second physical core mapped to first and second logical cores by a map. A policy processor is to evaluate the first metric to determine whether to change the map to remap at least one of the first and second logical cores relative to the second one of the first and the second physical cores to move a process between the first and second physical cores to adjust the property, the moving of the process between the physical cores being transparent to an application/OS layer. A mapping controller is responsive to the policy processor to change the map.

What is claimed is: 
     
         1 . An apparatus to manage heat in a central processing unit (CPU), the apparatus comprising:
 a metric collection agent to output a metric representative of a property of the central processor unit including a first core and a second physical core, the first physical core and the second physical core mapped to first and second logical cores by a map;   a policy processor to evaluate the first metric to determine whether to change the map to remap at least one of the first and second logical cores relative to the second one of the first and the second physical cores to move a process between the first and second physical cores to adjust the property, the moving of the process between the physical cores being transparent to an application/OS layer; and   a mapping controller responsive to the policy processor to change the map.   
     
     
         2 . The apparatus of  claim 1 , wherein the policy processor is implemented at a physical layer. 
     
     
         3 . The apparatus of  claim 1 , wherein the policy processor is implemented at a kernel layer. 
     
     
         4 . The apparatus of  claim 1 , wherein the metric collection agent is implemented at a physical layer. 
     
     
         5 . The apparatus of  claim 1 , wherein the metric collection agent is implemented at a kernel layer. 
     
     
         6 . The apparatus of  claim 1 , wherein the process is instantiated on a hypervisor executed at the application/OS layer. 
     
     
         7 . The apparatus of  claim 1 , wherein the process is instantiated in the application/OS layer. 
     
     
         8 . The apparatus of  claim 1 , wherein the metric is a temperature of the first core of the processor. 
     
     
         9 . The apparatus of  claim 8 , wherein a policy defines a threshold temperature for the first core, and the policy processor is to determine whether to initiate the remapping by comparing the temperature of the first core to the threshold temperature, and initiating the remapping when the temperature of the first core satisfies the threshold temperature. 
     
     
         10 . The apparatus of  claim 9 , further including a policy interface to access an updated policy from a policy manager. 
     
     
         11 . The apparatus of  claim 10 , wherein the policy manager is implemented by a server. 
     
     
         12 . The apparatus of  claim 9 , wherein the policy further identifies a frequency at which remapping of the process may occur. 
     
     
         13 . The apparatus of  claim 1 , further including a distance calculator to calculate a non-uniform memory architecture distance between the second core and memory associated with the process, and the policy processor is to determine whether the distance satisfies a distance threshold defined in the policy for the process, the policy processor to, in response to determining that the distance does not satisfy the distance threshold, revise the updated mapping to map the at least one of the first and second logical cores to a third physical core, a second distance between the third physical core and the memory associated with the process being less than the distance threshold. 
     
     
         14 . A computing system comprising:
 a central processing unit including a first physical core and a second physical core;   a kernel layer including a first logical core and a second logical core;   a mapper to dynamically map the first logical core to a first one of the first physical core and the second physical core, and to map the second logical to a second one of the first physical core and the second physical core; and   a wear level agent to control the mapper to remap the first logical core to the second one of the first physical core and the second physical core, and to remap the second logical to the first one of the first physical core and the second physical core based on heat detected in at least one of the first physical core and the second physical core, the remapping of the first and second logical cores being transparent to a process associated with the heat.   
     
     
         15 . The system of  claim 14 , wherein the wear level agent is implemented at a physical layer. 
     
     
         16 . The system of  claim 14 , wherein the wear level agent is implemented at the kernel layer. 
     
     
         17 . The system of  claim 14 , wherein the process is instantiated on a hypervisor executed at an application/OS layer. 
     
     
         18 . The system of  claim 14 , wherein the process is instantiated in an application/OS layer. 
     
     
         19 . At least one non-transitory machine readable medium comprising instructions which, when executed by at least one processor, cause the at least one processor to at least:
 access a first metric representing a property of a first core of a processor of a host;   evaluate the first metric against a policy to determine whether to initiate remapping of a process executed at the first physical core to a second physical core;   in response to determining that the process remapping should be initiated:
 determine an updated mapping to map the process to the second core of the processor; and 
 apply the updated mapping. 
   
     
     
         20 . The at least one non-transitory machine readable medium of  claim 19 , wherein the first metric is a temperature of the first core of the processor.