Fabrication of lateral superjunction devices using selective epitaxy

Abstract

A lateral superjunction includes a substrate layer, a selective epitaxy layer deposited on the substrate layer, a trench formed into the selective epitaxy layer to expose a portion of the substrate layer, a first layer of semiconductor deposited in the trench, a second layer of semiconductor deposited adjacent to the first layer, and a first end layer of semiconductor deposited adjacent to the first layer of semiconductor and a second end layer of semiconductor deposited adjacent to the second layer of semiconductor.

What is claimed is: 
     
         1 . A lateral superjunction comprising:
 a substrate layer;   a nucleation layer deposited on the substrate layer;   a trench formed into the nucleation layer to expose a portion of the substrate layer;   a first layer of semiconductor deposited in the trench;   a second layer of semiconductor deposited adjacent to the first layer; and   a first end layer of semiconductor deposited adjacent to the first layer of semiconductor and a second end layer of semiconductor deposited adjacent to the second layer of semiconductor.   
     
     
         2 . The lateral superjunction of  claim 1 , wherein the second layer of semiconductor is stacked on top of the first layer of semiconductor. 
     
     
         3 . The lateral superjunction of  claim 2 , wherein the first end layer of semiconductor and the second end layer of semiconductor are positioned over the trench. 
     
     
         4 . The lateral superjunction of  claim 2 , wherein the first end layer of semiconductor and the second end layer of semiconductor are oriented parallel to a length of the trench. 
     
     
         5 . The lateral superjunction of  claim 1 , wherein the first layer of semiconductor and the second layer of semiconductor are positioned next to one another in a side by side position. 
     
     
         6 . The lateral superjunction of  claim 5 , wherein:
 the first end layer of semiconductor contacts a first end of the first layer of semiconductor and a first end of the second layer of semiconductor; and   the second end layer of semiconductor contacts a second end of the first layer of semiconductor and a second end of the second layer of semiconductor.   
     
     
         7 . The lateral superjunction of  claim 1 , wherein the first layer of semiconductor and the first end layer of semiconductor comprise p-type semiconductors and the second layer of semiconductor and second end layer of semiconductor comprise n-type semiconductors. 
     
     
         8 . The lateral superjunction of  claim 1 , wherein the substrate layer comprises at least one of silicon and sapphire. 
     
     
         9 . The lateral superjunction of  claim 1 , wherein the nucleation layer comprises at least one of AlN, InN, and GaN. 
     
     
         10 . The lateral superjunction of  claim 1 , wherein the substrate layer comprises bulk GaN. 
     
     
         11 . The lateral superjunction of  claim 1 , wherein the first end layer of semiconductor and the second end layer of semiconductor each comprise an ohmic contact layer. 
     
     
         12 . The lateral superjunction of  claim 11 , wherein the ohmic contact layers comprise at least one of Al, Ti, Ni, Au, or Ta.