Rfic having coaxial interconnect and molded layer

Abstract

Semiconductor packages having a die electrically connected to an antenna by a coaxial interconnect are described. In an example, a semiconductor package includes a molded layer between a first antenna patch and a second antenna patch of the antenna. The first patch may be electrically connected to the coaxial interconnect, and the second patch may be mounted on the molded layer. The molded layer may be formed from a molding compound, and may have a stiffness to resist warpage during fabrication and use of the semiconductor package.

1 . An integrated circuit structure, comprising:
 a die including a die pad on a die face;   a redistribution layer over the die, wherein the redistribution layer includes an interconnect extending from the die pad orthogonal to the die face, the interconnect comprising a conductive trace and a conductor, the conductor laterally surrounding the conductive trace, and wherein the die pad is between the die face and the redistribution layer;   a molded layer over the redistribution layer, wherein the molded layer includes a molding compound; and   an antenna including a first antenna patch electrically coupled to the interconnect, and a second antenna patch mounted on the molded layer.   
     
     
         2 . The integrated circuit structure of  claim 1 , wherein the first antenna patch is mounted on the redistribution layer, and wherein the molded layer is between the first antenna patch and the second antenna patch. 
     
     
         3 . The integrated circuit structure of  claim 2 , wherein the first antenna patch is between the redistribution layer and the molded layer. 
     
     
         4 . The integrated circuit structure of  claim 2 , wherein the redistribution layer is between the die and the first antenna patch, and wherein the redistribution layer includes a lateral trace to carry an electrical signal between the interconnect and the first antenna patch. 
     
     
         5 . The integrated circuit structure of  claim 1 , wherein the die is embedded in the molded layer. 
     
     
         6 . The integrated circuit structure of  claim 1 , wherein the interconnect includes the conductive trace extending from the die pad, and the conductor extending from a second die pad on the die face. 
     
     
         7 . The integrated circuit structure of  claim 6 , wherein the conductor is further extending from a third die pad on the die face. 
     
     
         8 . An integrated circuit structure, comprising:
 a die including a die pad on a die face;   a redistribution layer over the die, wherein the redistribution layer includes an interconnect extending from the die pad orthogonal to the die face, the interconnect comprising a conductive trace and a conductor, the conductor concentric with the conductive trace, and wherein the die pad is between the die face and the redistribution layer;   a molded layer over the redistribution layer, wherein the molded layer includes a molding compound; and   an antenna including a first antenna patch electrically coupled to the interconnect, and a second antenna patch mounted on the molded layer.   
     
     
         9 . The integrated circuit structure of  claim 8 , wherein the first antenna patch is mounted on the redistribution layer, and wherein the molded layer is between the first antenna patch and the second antenna patch. 
     
     
         10 . The integrated circuit structure of  claim 9 , wherein the first antenna patch is between the redistribution layer and the molded layer. 
     
     
         11 . The integrated circuit structure of  claim 9 , wherein the redistribution layer is between the die and the first antenna patch, and wherein the redistribution layer includes a lateral trace to carry an electrical signal between the interconnect and the first antenna patch. 
     
     
         12 . The integrated circuit structure of  claim 8 , wherein the die is embedded in the molded layer. 
     
     
         13 . The integrated circuit structure of  claim 8 , wherein the interconnect includes the conductive trace extending from the die pad, and the conductor extending from a second die pad on the die face. 
     
     
         14 . The integrated circuit structure of  claim 13 , wherein the conductor is further extending from a third die pad on the die face. 
     
     
         15 . An integrated circuit structure, comprising:
 a die including a die pad on a die face;   a redistribution layer over the die, wherein the redistribution layer includes an interconnect extending from the die pad orthogonal to the die face, the interconnect comprising a central conductive trace and an annular conductor, and wherein the die pad is between the die face and the redistribution layer;   a molded layer over the redistribution layer, wherein the molded layer includes a molding compound; and   an antenna including a first antenna patch electrically coupled to the interconnect, and a second antenna patch mounted on the molded layer.   
     
     
         16 . The integrated circuit structure of  claim 15 , wherein the first antenna patch is mounted on the redistribution layer, and wherein the molded layer is between the first antenna patch and the second antenna patch. 
     
     
         17 . The integrated circuit structure of  claim 16 , wherein the first antenna patch is between the redistribution layer and the molded layer. 
     
     
         18 . The integrated circuit structure of  claim 16 , wherein the redistribution layer is between the die and the first antenna patch, and wherein the redistribution layer includes a lateral trace to carry an electrical signal between the interconnect and the first antenna patch. 
     
     
         19 . The integrated circuit structure of  claim 15 , wherein the die is embedded in the molded layer. 
     
     
         20 . The integrated circuit structure of  claim 15 , wherein the interconnect includes the central conductive trace extending from the die pad, and the annular conductor extending from a second die pad on the die face. 
     
     
         21 . The integrated circuit structure of  claim 20 , wherein the conductor is further extending from a third die pad on the die face.