Refresh rate control for a memory device

Abstract

Methods, systems, and devices for refresh rate control for a memory device are described. For example, a memory array of a memory device may be refreshed according to a first set of refresh parameters, such as a refresh rate. The memory device may detect an event at the memory device associated with a reduction in data integrity. In some cases, the event may be associated with a temperature of the memory device, a voltage level detected at the memory device, an error event at the memory device, or the like. As a result of detecting the event, the memory device may adapt one or more of the set of refresh parameters, such as increasing the refresh rate for the memory array. In some cases, the memory device may adapt the set of refresh parameters by increasing a quantity of rows of the memory array that are refreshed during a refresh operation, decreasing a periodicity between refresh operations, or both.

What is claimed is: 
     
         1 . An apparatus, comprising:
 a memory array having a plurality of rows of memory cells;   a memory interface coupled with the memory array and configured to periodically receive, from a host, a plurality of commands for refreshing rows of the memory array; and   circuitry coupled with the memory array and the memory interface, the circuitry operable to cause the apparatus to:
 identify a target rate for refreshing the memory array based at least in part on a detected event; 
 determine that a rate associated with the plurality of commands for refreshing the memory array does not satisfy the target rate; and 
 adjust one or more parameters related to refreshing rows of memory cells during an execution of a command of the plurality of commands for refreshing the rows of the memory array to satisfy the target rate. 
   
     
     
         2 . The apparatus of  claim 1 , wherein the detected event corresponds to one or more of a temperature event, a determined voltage condition, an error event, a minimum rate for refreshing the memory array, and a status of one or more components of the apparatus. 
     
     
         3 . The apparatus of  claim 1 , wherein the memory interface is further configured to transmit, to the host and based at least in part on the determining that the rate does not satisfy the target rate, signaling that indicates the adjusting of the one or more parameters. 
     
     
         4 . The apparatus of  claim 1 , wherein the circuitry is operable to cause the apparatus to determine that a temperature of the memory array fails to satisfy a threshold and to identify the detected event based at least in part on determining that the temperature fails to satisfy the threshold, wherein identifying the target rate is based at least in part on identifying the detected event. 
     
     
         5 . The apparatus of  claim 1 , wherein the circuitry is operable to cause the apparatus to determine that a voltage level of a power supply for the memory array fails to satisfy a threshold and to identify the detected event based at least in part on determining that the voltage level fails to satisfy the threshold, wherein identifying the target rate is based at least in part on identifying the detected event. 
     
     
         6 . The apparatus of  claim 1 , the circuitry is operable to cause the apparatus to determine that a quantity of error correction operations exceeds a threshold and to identify the detected event based at least in part on determining that the quantity of error correction operations exceeds the threshold, wherein identifying the target rate is based at least in part on identifying the detected event. 
     
     
         7 . A method, comprising:
 receiving, from a host, a plurality of commands for refreshing rows of a memory array;   identifying a target rate for refreshing the memory array based at least in part on a detected event;   determining that a rate associated with the plurality of commands for refreshing the memory array fails to satisfy the target rate; and   adjusting one or more parameters related to refreshing rows of memory cells during an execution of a command of the plurality of commands for refreshing the rows of the memory array to satisfy the target rate.   
     
     
         8 . The method of  claim 7 , wherein the detected event corresponds to one or more of a temperature event, a determined voltage condition, an error event, a minimum rate for refreshing the memory array, and a status of one or more components of the memory array. 
     
     
         9 . The method of  claim 7 , further comprising:
 transmitting, to the host and based at least in part on the determining that the rate fails to satisfy the target rate, signaling that indicates the adjusting of the one or more parameters.   
     
     
         10 . The method of  claim 9 , further comprising:
 transmitting, to the host, the signaling that indicates the detected event at the memory array.   
     
     
         11 . The method of  claim 7 , further comprising:
 determining the rate based at least in part on a refresh operation execution periodicity and a quantity of rows of the memory array that are refreshed during the execution of each refresh operation.   
     
     
         12 . The method of  claim 7 , further comprising:
 identifying the detected event based at least in part on determining that the rate is less than the one or more parameters related to refreshing the rows of memory cells, wherein identifying the target rate for refreshing the memory array is based at least in part on identifying the detected event.   
     
     
         13 . The method of  claim 7 , further comprising:
 detecting a degradation of one or more components of the memory array; and   identifying the detected event based at least in part on detecting the degradation of the one or more components of the memory array, wherein identifying the target rate for refreshing the memory array is based at least in part on identifying the detected event.   
     
     
         14 . The method of  claim 7 , wherein adjusting the one or more parameters comprises:
 adapting a quantity of rows executed during the execution of the command of the plurality of commands.   
     
     
         15 . A method, comprising:
 identifying a target rate for refreshing a memory array;   determining whether a rate associated with a plurality of operations for refreshing the memory array satisfies the target rate; and   adjusting one or more parameters for the plurality of operations for refreshing the memory array based at least in part on determining whether the rate satisfies the target rate.   
     
     
         16 . The method of  claim 15 , further comprising:
 determining that the rate associated with the plurality of operations for refreshing the memory array fails to satisfy the target rate, wherein adjusting the one or more parameters is based at least in part on determining that the rate fails to satisfy the target rate.   
     
     
         17 . The method of  claim 15 , wherein adjusting the one or more parameters comprises:
 adapting a quantity of rows executed for each of the plurality of operations for refreshing the memory array.   
     
     
         18 . The method of  claim 15 , wherein adjusting the one or more parameters comprises:
 adapting a periodicity of the plurality of operations for refreshing the memory array.   
     
     
         19 . The method of  claim 15 , wherein determining whether the rate associated with the plurality of operations for refreshing the memory array satisfies the target rate comprises:
 determining whether a current refresh command periodicity will cause the memory array to receive a quantity of refresh commands over a time period.   
     
     
         20 . The method of  claim 15 , wherein identifying the target rate is based at least in part on a temperature, a determined voltage condition, an error event, a minimum rate for refreshing the memory array, and a status of one or more components of the memory array.