Atom probe tomography specimen preparation

Abstract

The disclosure is directed to techniques in preparing an atom probe tomography (“APT”) specimen. A structure in a semiconductor device is identified as including a test object for an APT procedure. A target region is identified in the structure where an APT specimen will be obtained. The target region is analyzed to determine whether a challenging component feature exists therein. A challenging component may include a hard-to-evaporate material, a hollow region, or a material unidentifiable with respect to the test object, or other structural features that pose a challenge to a successful APT analysis. If it is determined that a challenging component exists in the target region, the challenging component is replaced with a more suitable material before the APT specimen is prepared.

What is claimed is: 
     
         1 . An atom probe tomography test sample, comprising:
 a first portion having a first material including a doped semiconductor material; and   a second portion that is adjacent to the first portion, the second portion being closer to a tip of the atom probe tomography test sample than the first portion, the second portion including a second material that includes ions having overlapping or adjacent mass spectrum peaks with respect to ions of the doped semiconductor material.   
     
     
         2 . The test sample of  claim 1 , wherein the second material is one or more of Co, Ni, AlO, TiO, ZnO, TaN, or TiN. 
     
     
         3 . The test sample of  claim 1 , wherein the second material is one or more of a carbon-based organic compound or an oxygen-based compound material. 
     
     
         4 . The test sample of  claim 1 , wherein the second material has a gap-filling property. 
     
     
         5 . The test sample of  claim 1 , comprising a dielectric material adjacent to the second portion and adjacent to the first portion, the dielectric material being different from the second material. 
     
     
         6 . The test sample of  claim 5 , wherein the second material is identifiable from the dielectric material in an atom probe tomography operation. 
     
     
         7 . The test sample of  claim 5 , wherein the second portion is adjacent to the first portion in a first direction, and the dielectric material is adjacent to the first portion in the first direction and is adjacent to the second portion in a second direction that is transverse to the first direction. 
     
     
         8 . An atom probe tomography test sample, comprising:
 a first portion having a first material including a doped semiconductor material;   a second portion that is adjacent to the first portion in a first direction, the second portion being closer to a tip of the atom probe tomography test sample than the first portion, the second portion including a second material that includes ions having overlapping or adjacent mass spectrum peaks with respect to ions of the doped semiconductor material; and   a third portion of a dielectric layer adjacent to the second portion in a second direction transverse to the first direction.   
     
     
         9 . The test sample of  claim 8 , wherein the second material is one or more of Co, Ni, AlO, TiO, ZnO, TaN, or TiN. 
     
     
         10 . The test sample of  claim 8 , wherein the second material is one or more of a carbon-based organic compound or an oxygen-based compound material. 
     
     
         11 . The test sample of  claim 8 , wherein the second material has a gap-filling property. 
     
     
         12 . The test sample of  claim 8 , wherein the second material is identifiable from the dielectric material in an atom probe tomography operation. 
     
     
         13 . A wafer, comprising:
 a substrate;   a first structure over the substrate, the first structure including a first semiconductor body and a first upper structure over the first semiconductor body; and   a second structure over the substrate, the second structure including a second semiconductor body and a second upper structure over the second semiconductor body;   wherein the first semiconductor body and the second semiconductor body are in a same layer and are substantially identical to one another, and the first upper structure and the second upper structure include different materials from one another.   
     
     
         14 . The wafer of  claim 13 , wherein a material of the second upper structure is easier to evaporate in field evaporation than a material of the first upper structure. 
     
     
         15 . The wafer of  claim 13 , wherein the first structure is an operational structure and the second structure is a test structure. 
     
     
         16 . The wafer of  claim 13 , further comprising a dielectric layer over the first structure and the second structure. 
     
     
         17 . The wafer of  claim 13 , wherein the first upper structure is one of a gate structure or an interconnect structure. 
     
     
         18 . The wafer of  claim 13 , wherein the first upper structure is a replacement gate structure and the second upper structure is a dummy gate structure. 
     
     
         19 . The wafer of  claim 13 , wherein the first upper structure is an interconnect structure and the second upper structure is a dielectric material. 
     
     
         20 . The wafer of  claim 13 , wherein the first structure and the second structure are positioned in a region designated to be segmented into a die for an integrated circuit.