Nonvolatile semiconductor memory device
Abstract
A nonvolatile semiconductor memory device comprises a cell array including a plurality of first lines, a plurality of second lines intersecting the plurality of first lines, and a plurality of memory cells arranged in matrix and connected at intersections of the first and second lines between both lines, each memory cell containing a serial circuit of an electrically erasable programmable variable resistive element of which resistance is nonvolatilely stored as data and a non-ohmic element; and a plurality of access circuits operative to simultaneously access the memory cells physically separated from each other in the cell array.
Claims
exact text as granted — not AI-modified1 . A nonvolatile semiconductor memory device, comprising: a cell array including a plurality first lines, a plurality of second lines intersecting said plurality of first lines, and a plurality of memory cells arranged in matrix and connected at intersections of said first and second lines between both lines, each memory cell containing a serial circuit of an electrically erasable programmable variable resistive element of which resistance is nonvolatilely stored as data and a non-ohmic element; and an access circuit operative to simultaneously access plural memory cells physically separated from each other in said cell array.
Join the waitlist — get patent alerts
Track US2021343337A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.