US2021343323A1PendingUtilityA1

Refresh command management

Assignee: MICRON TECHNOLOGY INCPriority: Nov 30, 2018Filed: May 13, 2021Published: Nov 4, 2021
Est. expiryNov 30, 2038(~12.3 yrs left)· nominal 20-yr term from priority
G11C 11/221G06F 3/0659G06F 3/0673G11C 11/40615G11C 11/406G06F 3/0619G11C 11/40603G11C 11/225G11C 11/40611G11C 11/40626G11C 11/2275
57
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Claims

Abstract

Methods, systems, and devices for refresh command management are described. A memory device may conduct a refresh operation to preserve the integrity of data stored to one or more memory cells. In some examples, the frequency of refresh operations conducted may be based on the memory device's temperature and may be initiated based on one or more commands received from an external device (e.g., a host device). Each command may be transmitted by the host device at a defined rate, which may impact the rate at which the memory device conducts one or more refresh operations. The memory device may postpone or skip at least a portion of one or more refresh operations based on one or more operating parameters of the memory device.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A method, comprising:
 receiving a command for a refresh operation associated with a first set of refresh events at a memory device;   determining a second set of refresh events based at least in part on a temperature associated with the memory device, the second set of refresh events different than the first set of refresh events; and   performing the second set of refresh events in response to the command.   
     
     
         3 . The method of  claim 2 , wherein performing the second set of refresh events comprises:
 skipping or postponing one or more refresh events included in the first set of refresh events.   
     
     
         4 . The method of  claim 2 , wherein each refresh event of the set of refresh events and each refresh event of the second set of refresh events comprises a refresh of one or more rows of memory cells within the memory device. 
     
     
         5 . The method of  claim 2 , wherein determining the second set of refresh events based at least in part on the temperature associated with the memory device comprises:
 determining a quantity of refresh events within the first set of refresh events to skip based at least in part on the temperature associated with the memory device.   
     
     
         6 . The method of  claim 2 , wherein determining the second set of refresh events based at least in part on the temperature associated with the memory device comprises:
 determining a quantity of refresh events within the first set of refresh events to postpone based at least in part on the temperature associated with the memory device.   
     
     
         7 . The method of  claim 2 , further comprising:
 determining that temperature associated with the memory device is within a temperature range of a plurality of temperature ranges, wherein each of the plurality of temperature ranges is associated with skipping or postponing a different quantity of refresh events, and wherein performing the second set of refresh events comprises skipping or postponing a quantity of refresh events associated with the temperature range.   
     
     
         8 . The method of  claim 2 , wherein:
 the memory device comprises a first die, the first die and a second die coupled with a command bus;   the command is received by the first die and the second die via the command bus;   the temperature associated with the memory device comprises a temperature of the first die; and   performing the second set of refresh events comprises performing a different quantity of refresh events at the first die than at the second die in response to the command.   
     
     
         9 . The method of  claim 2 , wherein:
 the memory device comprises a first die, the first die and a second die coupled with a command bus;   the command is received by the first die and the second die via the command bus;   the temperature associated with the memory device comprises a temperature of the first die; and   performing the second set of refresh events comprises performing one or more refresh events at the first die in accordance with a different timing than a third set of refresh events performed at the second die.   
     
     
         10 . The method of  claim 2 , further comprising:
 receiving, at the memory device, a second command for a second refresh operation associated with a third set of refresh events;   determining a fourth set of refresh events based at least in part on a second temperature associated with the memory device, the fourth set of refresh events different than the third set of refresh events and the second set of refresh events; and   performing the fourth set of refresh events in response to the second command.   
     
     
         11 . The method of  claim 10 , wherein:
 performing the second set of refresh events comprises skipping or postponing a first quantity of one or more refresh events included in the first set of refresh events; and   performing the fourth set of refresh events comprises skipping or postponing a second quantity of one or more refresh events included in the third set of refresh events, the second quantity different than the first quantity.   
     
     
         12 . An apparatus, comprising:
 a memory array;   a command decoder configured to decode a command for a refresh operation associated with a first set of refresh events at the memory array;   a refresh logic component configured to determine a second set of refresh events based at least in part on a temperature associated with the memory array, the second set of refresh events different than the first set of refresh events; and   a refresh control component configured to perform the second set of refresh events in response to the command.   
     
     
         13 . The apparatus of  claim 12 , wherein, to perform the second set of refresh events, the refresh control component is configured to skip or postpone one or more refresh events included in the first set of refresh events. 
     
     
         14 . The apparatus of  claim 12 , wherein each refresh event of the set of refresh events and each refresh event of the second set of refresh events comprises a refresh of one or more rows of memory cells within the memory array. 
     
     
         15 . The apparatus of  claim 12 , wherein, to determine the second set of refresh events based at least in part on the temperature associated with the memory array, the refresh logic component is configured to determine a quantity of refresh events within the first set of refresh events to skip based at least in part on the temperature associated with the memory device. 
     
     
         16 . The apparatus of  claim 12 , wherein, to determine the second set of refresh events based at least in part on the temperature associated with the memory array, the refresh logic component is configured to determine a quantity of refresh events within the first set of refresh events to postpone based at least in part on the temperature associated with the memory device. 
     
     
         17 . An apparatus, comprising:
 a memory device; and   controller for the memory device, wherein the controller is configured to cause the apparatus to:
 receive a command for a refresh operation associated with a first set of refresh events at the memory device; 
 determine a second set of refresh events based at least in part on a temperature associated with the memory device, the second set of refresh events different than the first set of refresh events; and 
 perform the second set of refresh events in response to the command. 
   
     
     
         18 . The apparatus of  claim 17 , wherein, to perform the second set of refresh events, the controller is configured to cause the apparatus to:
 skip or postpone one or more refresh events included in the first set of refresh events.   
     
     
         19 . The apparatus of  claim 17  wherein each refresh event of the set of refresh events and each refresh event of the second set of refresh events comprises a refresh of one or more rows of memory cells within the memory array. 
     
     
         20 . The apparatus of  claim 17 , wherein, to determine the second set of refresh events based at least in part on the temperature associated with the memory array, the controller is configured to cause the apparatus to:
 determine a quantity of refresh events within the first set of refresh events to skip based at least in part on the temperature associated with the memory device.   
     
     
         21 . The apparatus of  claim 17 , wherein, to determine the second set of refresh events based at least in part on the temperature associated with the memory array, the controller is configured to cause the apparatus to:
 determine a quantity of refresh events within the first set of refresh events to postpone based at least in part on the temperature associated with the memory device.

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