System, methods and apparatuses for in situ electrochemical imaging

Abstract

Systems, methods and apparatuses described herein generally provide a millimetre size package-free complementary metal-oxide-semiconductor (“CMOS”) chip (referred to as a “die”) for the in situ (on-site) measurement or imaging of electrochemically detectable analytes.

1 . A potentiostat circuit comprising:
 a. an op-amp-less integrator circuit comprising a grounded capacitor for integration of the recorded analog signal;   b. a comparator coupled to an output of the integrator circuit to reduce signal distortion thereof;   c. a digital-to-analog converter providing a negative feedback loop from an output of the comparator to the output of the integrator circuit; and   d. a pulse shaping block providing an output signal of the potentiostat.   
     
     
         2 . The potentiostat circuit of  claim 7 , wherein the comparator is a zero-hysteresis comparator circuit. 
     
     
         3 . The potentiostat circuit of  claim 8 , wherein the comparator circuit reduces naturally occurring hysteresis in the comparator by isolating the output of the comparator from its input. 
     
     
         4 . The potentiostat circuit of  claim 7 , wherein the op-amp-less delta-sigma ADS is coupled to the recording module array without the need for an intermediary transimpedance amplifier. 
     
     
         5 . A integrated circuit for electrochemically measuring target analytes of a subject comprising:
 a. a power coil for receiving power from a receiver device by magnetic induction;   b. a microelectrode array and an associated amperometric channel array for measuring the target analytes of the subject and generating sensor readings; and   c. a transmitter for wirelessly transmitting sensor readings to the receiver device.   
     
     
         6 . The integrated circuit of  claim 11 , wherein the amperometric channel array comprises an op-amp-less delta-sigma-ADC-based potentiostat and a 1 bit multiplication circuit comprising an XOR gate and a counter. 
     
     
         7 . The integrated circuit of  claim 12 , wherein the op-amp-less delta-sigma-ADC-based potentiostat comprises:
 a. an op-amp less integrator circuit coupled to the microelectrode array, the integrator circuit comprising a grounded capacitor for integration of the recorded analog signal;   b. a comparator coupled to an output of the integrator circuit to reduce signal distortion thereof;   c. a digital-to-analog converter providing a negative feedback loop from an output of the comparator to the output of the integrator circuit; and   d. a pulse shaping block providing an output signal of the potentiostat.   
     
     
         8 . A method for in situ electrochemical imaging of target analytes of a subject comprising:
 a. implanting an integrated circuit on, in or adjacent to a targeted region of the subject, the integrated circuit comprising:
 i. a power coil for receiving power from a receiver device by magnetic induction; 
 ii. a microelectrode array and an associated amperometric channel array for measuring the target analytes of the subject and generating sensor readings; and 
 iii. a transmitter for transmitting sensor readings to the receiver device; 
   b. positioning the receiver device on a surface of the subject;   c. receiving sensor readings at the receiver device; and   d. processing the sensor readings to diagnose risk of seizure onset in the subject.   
     
     
         9 . The method of claim  14 , wherein the targeted region is the cortex. 
     
     
         10 . The method of claim  15 , wherein the surface is the scalp. 
     
     
         11 . The method of claim  14 , wherein the amperometric channel array comprises an op-amp-less delta-sigma-ADC-based potentiostat and a 1 bit multiplication circuit comprising an XOR gate and a counter. 
     
     
         12 . The method of claim  17 , wherein the op-amp-less delta-sigma-ADC-based potentiostat comprises:
 a. an op-amp less integrator circuit coupled to the microelectrode array, the integrator circuit comprising a grounded capacitor for integration of the recorded analog signal;   b. a comparator coupled to an output of the integrator circuit to reduce signal distortion thereof;   c. a digital-to-analog converter providing a negative feedback loop from an output of the comparator to the output of the integrator circuit; and   d. a pulse shaping block providing an output signal of the potentiostat