US2021273009A1PendingUtilityA1

Bonding Pad on a Back Side Illuminated Image Sensor

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Feb 8, 2013Filed: May 17, 2021Published: Sep 2, 2021
Est. expiryFeb 8, 2033(~6.5 yrs left)· nominal 20-yr term from priority
H10W 72/536H04N 25/00H10W 80/732H10W 72/952H10W 72/932H10W 72/923H10W 72/234H10W 72/232H10W 72/29H10W 72/20H10W 72/019H10W 10/021H10W 10/20H10P 14/40H10W 72/90H10F 39/18H10F 39/199H10F 39/011H10F 39/811H10F 39/12H01L 24/14H01L 21/764H04N 5/335H01L 27/1464H01L 24/03H01L 24/08H01L 24/05H01L 27/14683H01L 27/14636
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Claims

Abstract

A bonding pad structure comprises an interconnect layer, an isolation layer over the interconnect layer, a conductive pad, and one or more non-conducting stress-releasing structures. The conductive pad comprises a planar portion over the isolation layer, and one or more bridging portions extending through at least the isolation layer and to the interconnect layer for establishing electric contact therewith, wherein there is a trench in the one or more bridging portions. The one or more non-conducting stress-releasing structures are disposed between the isolation layer and the conductive pad. The trench is surrounded by one of the one or more non-conducting stress-releasing structures from a top view.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of fabricating a bonding pad, comprising:
 forming an isolation layer over an interconnect layer;   forming non-conducting stress-releasing structures over the isolation layer, wherein the non-conducting stress-releasing structures each have a configuration of a surrounding wall from a top view; and   forming a conductive pad comprising a planar portion overlying the isolation layer, and one or more bridging portions extending through the surrounding wall of the non-conducting stress-releasing structures, and through at least the isolation layer, and to the interconnect layer for establishing electric contact therewith.   
     
     
         2 . The method of  claim 1 , wherein the device is a back side illuminated (BSI) image sensor. 
     
     
         3 . The method of  claim 1 , further comprising:
 bonding a conductive ball with the planar portion of the conductive pad.   
     
     
         4 . The method of  claim 1 , wherein the forming of the non-conducting stress-releasing structures includes:
 depositing an oxide material to form an oxide layer, and   partially etching the oxide layer.   
     
     
         5 . The method of  claim 1 , wherein the forming of the conductive pad includes:
 etching at least the isolation layer to form one or more trenches reaching down to the interconnect layer; and   depositing a conductive material over the isolation layer, over the non-conducting stress-releasing structures, and into the one or more trenches.   
     
     
         6 . The method of  claim 1 , wherein the device comprises an interlayer dielectric layer over the interconnect layer in the bonding pad region, and wherein the isolation layer is formed over the interlayer dielectric layer. 
     
     
         7 . The method of  claim 6 , wherein the interconnect layer includes spaces between interconnects and the interlayer dielectric layer fills in the spaces. 
     
     
         8 . A method of forming a bonding pad structure, comprising:
 receiving a device having an interconnect layer;   forming an isolation layer over the interconnect layer;   depositing a dielectric layer over the isolation layer;   removing a portion of the dielectric layer to form a structure over the isolation layer and exposing a portion of the dielectric layer; and   forming a conductive pad over the dielectric layer including over the exposed portion of the dielectric layer.   
     
     
         9 . The method of  claim 8 , further comprising,
 before forming the conductive pad, forming a trench in the isolation layer and the interconnect layer; and   wherein the forming of the conductive pad includes forming the conductive pad in the trench on a sidewall of the isolation layer and a sidewall of the interconnect layer.   
     
     
         10 . The method of  claim 9 , wherein the conductive pad is further formed on an exposed top surface of the interconnect layer. 
     
     
         11 . The method of  claim 8 , further comprising:
 before forming the isolation layer, forming an interlayer dielectric layer over the interconnect layer.   
     
     
         12 . The method of  claim 8 , wherein the conductive pad includes a horizontal portion and a vertical portion. 
     
     
         13 . The method of  claim 12 , further comprising:
 bonding a conductive ball with the horizontal portion of the conductive pad.   
     
     
         14 . The method of  claim 8 , wherein the dielectric layer includes an oxide material. 
     
     
         15 . A method, comprising:
 forming an isolation layer over a backside of a semiconductor device;   forming a dielectric layer overt the isolation layer;   removing a portion of the dielectric layer to form a stress-releasing structure and exposing a portion of the isolation layer; and   forming a conductive layer over the stress-releasing structure including over the exposed portion of the isolation layer.   
     
     
         16 . The method of  claim 15 , further comprising:
 bonding a conductive ball with the conductive layer.   
     
     
         17 . The method of  claim 16 , further comprising:
 wherein the stress-releasing structure includes a first portion and an adjacent second portion, and   forming a trench in the isolation layer between the first portion of the stress-releasing structure and the second portion of the stress-releasing structure.   
     
     
         18 . The method of  claim 17 , further comprising:
 before forming the isolation layer, forming an interlayer dielectric layer over the backside of the semiconductor device; and   forming the isolation layer over the interlayer dielectric layer.   
     
     
         19 . The method of  claim 18 , wherein the forming of the trench in the isolation layer between the first portion and the second portion includes forming the trench in the interlayer dielectric layer. 
     
     
         20 . The method of  claim 19 , wherein the forming of the conductive layer over the stress-releasing structure including over the exposed portion of the isolation layer includes forming the conductive layer in the trench.

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