Comparator, ad converter, photoelectric conversion device, imaging system, and mobile object

Abstract

A disclosed comparator includes a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node, and a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.

What is claimed is: 
     
         1 . A comparator comprising:
 a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node; and   a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.   
     
     
         2 . The comparator according to  claim 1 , wherein the amplifier unit of the comparison circuit includes a first transistor of a first conductivity type whose first main node is connected to a first voltage node supplied with a first voltage and whose control node is connected to the first node and a first current source load connected between a second voltage node supplied with a second voltage, which is different from the first voltage, and a second main node of the first transistor. 
     
     
         3 . The comparator according to  claim 2 , wherein the first current source load includes a second transistor that forms a gate grounded circuit and whose control node is supplied with a bias voltage that is different from a reference voltage. 
     
     
         4 . The comparator according to  claim 3 , wherein the first current source load further includes a bias hold capacitor connected to the control node of the second transistor. 
     
     
         5 . The comparator according to  claim 1 , wherein the amplifier unit of the comparison circuit includes a first transistor of a first conductivity type whose first main node is connected to a first voltage node supplied with a first voltage and whose control node is connected to the first node and a resistor connected between a second voltage node supplied with a second voltage, which is different from the first voltage, and a second main node of the first transistor. 
     
     
         6 . The comparator according to  claim 2 , wherein the amplifier unit of the comparison circuit further includes a third transistor of the first conductivity type whose first main node is connected to the first voltage node and whose control node is connected to the second node and a second current source load connected between a second main node of the third transistor and the second voltage node. 
     
     
         7 . The comparator according to  claim 6 , wherein the amplifier unit of the comparison circuit further includes a fourth transistor of the first conductivity type connected between the first main node of the third transistor and the first voltage node. 
     
     
         8 . The comparator according to  claim 2 , wherein the positive feedback circuit includes an inverter that inverts a level of a signal at the second node and outputs the inverted level of the signal to the third node and a feedback unit that positively feeds back a signal in accordance with a potential of the third node to the second node. 
     
     
         9 . The comparator according to  claim 8 , wherein the third node is an output node of the positive feedback circuit. 
     
     
         10 . The comparator according to  claim 2 , wherein the positive feedback circuit includes an amplifier unit that outputs a signal in accordance with a potential of the second node to the third node and a feedback unit that positively feeds back a signal in accordance with a potential of the third node to the second node. 
     
     
         11 . The comparator according to  claim 10 , wherein the second node is an output node of the positive feedback circuit. 
     
     
         12 . The comparator according to  claim 10 , wherein the amplifier unit of the positive feedback circuit further includes a fifth transistor of a first conductivity type whose first main node is connected to a third voltage node supplied with the first voltage and whose control node is connected to the second node and a third current source load connected between a fourth voltage node supplied with the second voltage and a second main node of the fifth transistor. 
     
     
         13 . The comparator according to  claim 12 , wherein the amplifier unit of the positive feedback circuit further includes a sixth transistor of the first conductivity type connected between the first main node of the fifth transistor and the third voltage node. 
     
     
         14 . The comparator according to  claim 8 , wherein the feedback unit further includes
 a seventh transistor of a first conductivity type whose first main node is connected to a third voltage node supplied with the first voltage, and   an eighth transistor of the first conductivity type whose first main node is connected to a second main node of the seventh transistor, whose second main node is connected to the second node, and whose control node is connected to the third node.   
     
     
         15 . The comparator according to  claim 14  further comprising:
 a pad electrode used for supplying the first voltage; 
 a first interconnection connected between the pad electrode and the first voltage node; and 
 a second interconnection connected between the pad electrode and the third voltage node. 
 
     
     
         16 . The comparator according to  claim 14  further comprising:
 a first pad electrode and a second pad electrode used for supplying the first voltage; 
 a first interconnection connected between the first pad electrode and the first voltage node; and 
 a second interconnection connected between the second pad electrode and the third voltage node. 
 
     
     
         17 . The comparator according to  claim 8 , wherein the feedback unit further includes
 a ninth transistor of a second conductivity type whose first main node is connected to the second node, and   a tenth transistor of the second conductivity type whose first main node is connected to a second main node of the ninth transistor, whose second main node is connected to a fourth voltage node supplied with the second voltage, and whose control node is connected to the third node.   
     
     
         18 . The comparator according to  claim 17  further comprising:
 a pad electrode used for supplying the second voltage; 
 a third interconnection connected between the pad electrode and the second voltage node; and 
 a fourth interconnection connected between the pad electrode and the fourth voltage node. 
 
     
     
         19 . The comparator according to  claim 17  further comprising:
 a third pad electrode and a fourth pad electrode used for supplying the second voltage; 
 a third interconnection connected between the third pad electrode and the fourth voltage node; and 
 a fourth interconnection connected between the fourth pad electrode and the second voltage node. 
 
     
     
         20 . The comparator according to  claim 2 , wherein the first voltage is a power supply voltage, and the second voltage is a reference voltage. 
     
     
         21 . The comparator according to  claim 1 , wherein the comparison circuit includes a clamp capacitor provided to a node to which the input signal is input and a clamp capacitor provided to a node to which the reference signal is input. 
     
     
         22 . An analog-to-digital converter comprising:
 the comparator according to  claim 1 ; and   a counter circuit that outputs, as digital data of the input signal, a count value in accordance with a length of a period from start of comparison between the input signal and the reference signal to a change of a level of the signal output to the first node.   
     
     
         23 . A photoelectric conversion device comprising:
 a plurality of pixels arranged so as to form a plurality of rows and a plurality of columns and each including a photoelectric converter;   a plurality of output lines each arranged on each of the plurality of columns and each connected to pixels on a corresponding column; and   a plurality of analog-to-digital converters according to  claim 22  each connected to each of the plurality of output lines and configured to perform analog-to-digital conversion on pixel signals output from pixels on a corresponding column.   
     
     
         24 . The photoelectric conversion device according to  claim 23 , wherein two or more of the output lines are arranged on each of the plurality of columns 
     
     
         25 . The photoelectric conversion device according to  claim 24 , wherein comparison circuits and positive feedback circuits of two or more of the analog-to-digital converters arranged on the same column are arranged close to each other for each of the comparison circuits and the positive feedback circuits. 
     
     
         26 . A photoelectric conversion device comprising:
 a plurality of pixel units arranged so as to form a plurality of rows and a plurality of columns and each including a pixel including a photoelectric converter and the comparator according to  claim 1  in which a signal in accordance with charge generated in the photoelectric converter of the pixel is the input signal;   a plurality of output lines arranged on each of the plurality of columns and each connected to pixel units on a corresponding column; and   a counter circuit that is provided in association with each of the plurality of output lines and outputs, as digital data of the input signal, a count value in accordance with a length of a period from start of comparison between the input signal and the reference signal to a change of a level of a signal output from pixel unit on a corresponding column.   
     
     
         27 . The photoelectric conversion device according to  claim 23  comprising:
 a first substrate on which the photoelectric converter is provided; and 
 a second substrate that is stacked on the first substrate and on which at least a part of the comparator is provided. 
 
     
     
         28 . An imaging system comprising:
 the photoelectric conversion device according to  claim 23 ; and   a signal processing unit that processes a signal output from the photoelectric conversion device.   
     
     
         29 . A movable object comprising:
 the photoelectric conversion device according to  claim 23 ;   a distance information acquisition unit that acquires distance information on a distance to an object, from a parallax image based on signals from the photoelectric conversion device; and   a control unit that controls the movable object based on the distance information.