Semiconductor Strain Gauge and Method for Manufacturing Same

Abstract

Semiconductor strain gages fabricated on Silicon-on-insulator (SOI) material, and the method of making them. Force sensing elements are uniformly batch-fabricated at wafer level and singulated individually by a wire bonding method. In another method, they are singulated by plucking them off the wafer from their attachment site.

1 ) A method of manufacturing semiconductor strain gauges comprising:
 forming an electrically resistive path including at least two metallic pads for electrical connection; fabricating an electrically resistive element by photo-lithographically patterning a device layer of a SOI wafer; and etching the device layer; wherein said metallic pads are generated on top of said electrically resistive element by photo-lithographically patterning the pads via metal deposition and metal etching; and said gages are located on top of a BOX of the SOI wafer.   
     
     
         2 ) The method of  claim 1 , wherein said metallic pads are patterned using a lift-off technique. 
     
     
         3 ) The method of  claim 1 , wherein each gage is physically attached at least at one location to the frame of the device layer. 
     
     
         4 ) A method of freeing the semiconductor strain gauges of  claim 1  comprising:
 attaching metal wires to said metallic pads; protecting the device layer of said semiconductor strain gages and said metal wires by using a passivation substance and an inert substrate for mechanical support; etching said carrier wafer of said semiconductor strain gage; 
 
       etching the BOX of the SOI wafer; and freeing the Individual guages by Immersion in solvents to remove passivation substance. 
     
     
         5 ) A method of singulating the devices of  claim 3  comprising protecting said device layer through the use of a passivation substance and an inert substrate for mechanical support; etching said carrier wafer; etching said BOX of the SOI wafer; clearing gages by immersion of the remaining portion of said SOI wafer in solvents to remove said passivation substance. 
     
     
         6 ) A semiconductor strain gage semiconductor comprising an electrically resistive path including at least two metallic pads for electrical connection; and a photo-lithographically patterned device layer of a SOI wafer.