US2021217633A1PendingUtilityA1

Semiconductor device having a semiconductor die embedded in a molding compound

Assignee: INFINEON TECHNOLOGIES AGPriority: Aug 21, 2019Filed: Mar 30, 2021Published: Jul 15, 2021
Est. expiryAug 21, 2039(~13.1 yrs left)· nominal 20-yr term from priority
H10P 76/2041H10P 54/00H10W 72/981H10W 74/111H10W 74/019H10W 74/014H10W 72/90H10W 70/05H10W 74/142H10W 74/10H10W 72/0198H10W 72/9413H10W 70/655H10W 70/09H10W 70/093H10W 90/10H10W 74/016H10W 74/131H10W 74/01H01L 21/561H01L 21/568H01L 24/05H01L 21/565H01L 21/78H01L 23/3107H01L 2224/02205H01L 21/4846H01L 21/0274
55
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Claims

Abstract

A semiconductor device includes: a first semiconductor die having opposing first and second main surfaces and an edge between the first and second main surfaces; a molding compound covering the edge and a peripheral part of the first main surface of the first semiconductor die, the molding compound including a resin and filler particles embedded within the resin; and a first opening in the molding compound which exposes a first part of the first main surface of the first semiconductor die from the molding compound, the first part being positioned inward from the peripheral part, wherein the first opening in the molding compound has a sidewall, wherein predominantly all of the filler particles disposed along the sidewall of the first opening are fully embedded within the resin and not exposed at all along the sidewall. A semiconductor structure including a semiconductor wafer or panel is also described.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface;   a molding compound covering the edge and a peripheral part of the first main surface of the first semiconductor die, the molding compound comprising a resin and filler particles embedded within the resin; and   a first opening in the molding compound which exposes a first part of the first main surface of the first semiconductor die from the molding compound, the first part being positioned inward from the peripheral part,   wherein the first opening in the molding compound has a sidewall,   wherein predominantly all of the filler particles disposed along the sidewall of the first opening are fully embedded within the resin and not exposed at all along the sidewall.   
     
     
         2 . The semiconductor device of  claim 1 , wherein a first metal pad of the first semiconductor die is exposed from the molding compound by the first opening. 
     
     
         3 . The semiconductor device of  claim 2 , further comprising:
 a first metallization formed on the exposed part of the first metal pad,   wherein the first metallization fills the first opening.   
     
     
         4 . The semiconductor device of  claim 1 , further comprising:
 a second opening in the molding compound which exposes a second part of the first main surface of the first semiconductor die from the molding compound, the second part being positioned inward from the peripheral part,   wherein the second opening in the molding compound has a sidewall,   wherein predominantly all of the filler particles disposed along the sidewall of the second opening are fully embedded within the resin and not exposed at all along the sidewall   
     
     
         5 . The semiconductor device of  claim 4 , wherein a first metal pad of the first semiconductor die is exposed from the molding compound by the first opening, and wherein a second metal pad of the first semiconductor die is exposed from the molding compound by the second opening. 
     
     
         6 . The semiconductor device of  claim 5 , further comprising:
 a first metallization formed on the exposed part of the first metal pad; and   a second metallization formed on the exposed part of the second metal pad,   wherein the first metallization fills the first opening,   wherein the second metallization fills the second opening.   
     
     
         7 . The semiconductor device of  claim 6 , further comprising:
 a third metallization embedded in the molding compound and formed on the first metallization; and   a fourth metallization embedded in the molding compound and formed on the second metallization.   
     
     
         8 . The semiconductor device of  claim 7 , wherein one or more of the first, second, third, and fourth metallizations forms part of a redistribution layer. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the sidewall of the first opening is sloped to form an angle which is greater than 90° with respect to the first main surface of the first semiconductor die. 
     
     
         10 . The semiconductor device of  claim 1 , wherein the sidewall of the first opening has an undercut, and wherein the molding compound fills the undercut. 
     
     
         11 . The semiconductor device of  claim 1 , wherein the sidewall of the first opening is vertical with respect to the first main surface of the first semiconductor die. 
     
     
         12 . The semiconductor device of  claim 1 , further comprising:
 a second semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface,   wherein the molding compound covers the edge and a peripheral part of the first main surface of the second semiconductor die,   wherein a second opening in the molding compound exposes a first part of the first main surface of the second semiconductor die from the molding compound, the first part being positioned inward from the peripheral part,   wherein the second opening in the molding compound has a sidewall,   wherein predominantly all of the filler particles disposed along the sidewall of the second opening are fully embedded within the resin and not exposed at all along the sidewall.   
     
     
         13 . The semiconductor device of  claim 12 , wherein a metal pad of the first semiconductor die is exposed from the molding compound by the first opening, and wherein a metal pad of the second semiconductor die is exposed from the molding compound by the second opening. 
     
     
         14 . The semiconductor device of  claim 13 , further comprising:
 a metallization that extends onto a side of the molding compound facing away from the first and second semiconductor dies,   wherein the metallization fills the first opening and the second opening,   wherein the metallization is connected to the metal pad at the first main surface of the first semiconductor die and to the metal pad at the first main surface of the second semiconductor die.   
     
     
         15 . The semiconductor device of  claim 14 , wherein the metallization electrically interconnects the metal pad at the first main surface of the first semiconductor die and the metal pad at the first main surface of the second semiconductor die. 
     
     
         16 . The semiconductor device of  claim 14 , wherein the metallization forms part of a redistribution layer. 
     
     
         17 . The semiconductor device of  claim 12 , wherein the first semiconductor die and the second semiconductor die have different thicknesses. 
     
     
         18 . The semiconductor device of  claim 1 , wherein the first part of the first main surface of the semiconductor die comprises a sensor structure, and wherein at least part of a first side of the sensor structure is exposed from the molding compound. 
     
     
         19 . The semiconductor device of  claim 18 , wherein at least part of a second side of the sensor structure opposite the first side is exposed from the molding compound. 
     
     
         20 . A semiconductor structure, comprising:
 a semiconductor wafer or panel having a plurality of singulated semiconductor dies, each singulated semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface;   a temporary spacer on a first part of the first main surface of each singulated semiconductor die, the first part being positioned inward from a peripheral part of the first main surface; and   a molding compound at least partly embedding each singulated semiconductor die,   wherein the molding compound covers the edge and the peripheral part of the first main surface of each of singulated semiconductor die and contacts a sidewall of the corresponding temporary spacer.

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