Virtual register file

Abstract

The present disclosure is related to a virtual register file. Source code can be compiled to include references to a virtual register file for data subject to a logical operation. The references can be dereferenced at runtime to obtain physical addresses of memory device elements according to the virtual register file. The logical operation can be performed in the memory device on data stored in the memory device elements.

What is claimed is: 
     
         1 . A method, comprising:
 compiling source code to include references to a virtual register file to target what appears to be a register-memory architecture for data subject to a logical operation to be performed by a memory device on data stored in memory device elements as though the virtual register file was a physical register of a processor without using the physical register of the processor.   
     
     
         2 . The method of  claim 1 , further comprising not transferring the data subject to the logical operation to the virtual register file. 
     
     
         3 . The method of  claim 1 , wherein compiling the source code comprises compiling the source code at a host coupled to the memory device. 
     
     
         4 . The method of  claim 1 , wherein the references to the virtual register file comprise indices to virtual vector registers in the virtual register file. 
     
     
         5 . The method of  claim 3 , wherein the method includes storing virtual addresses in the virtual vector registers. 
     
     
         6 . The method of  claim 1 , wherein the method includes performing the logical operation by the memory device at runtime. 
     
     
         7 . The method of  claim 1 , wherein the method includes:
 compiling the source code to include a reference to the virtual register file for data subject to a memory operation; and   dereferencing the reference at runtime to obtain physical addresses of a particular one of the memory device elements according to the virtual register file.   
     
     
         8 . A method, comprising:
 performing a logical operation by a memory device on data stored in a particular physical address according to a portion of compiled source code associated with a virtual register file of a host device that addresses a particular virtual address, which targets the virtual register file as though it was a physical register of a processor of the host device without using the physical register of the processor of the host device,   wherein the particular virtual address corresponds to the particular physical address.   
     
     
         9 . The method of  claim 8 , wherein the virtual addresses are referenced by indices in the compiled source code. 
     
     
         10 . The method of  claim 8 , further comprising translating the particular virtual memory address to the particular physical address. 
     
     
         11 . The method of  claim 10 , wherein translating the particular virtual address is performed in a runtime environment of the memory device. 
     
     
         12 . An apparatus, comprising:
 a memory device; and   a host coupled to the memory device, wherein the host includes a processor, a physical register, and main memory, and wherein the host is configured to:
 load, at runtime by an application, a library including a virtual register file into the main memory of the host; and 
 translate a particular virtual memory address, which targets the virtual register file as though it was the physical register, to a physical address of the memory device for a logical operation to be performed by the memory device without use of the physical register. 
   
     
     
         13 . The apparatus of  claim 12 , wherein the host is further configured to create, at runtime, the virtual register file including virtual memory addresses of memory device elements. 
     
     
         14 . The apparatus of  claim 13 , wherein the host is further configured to relocate the application in the main memory without editing the virtual register file. 
     
     
         15 . The apparatus of  claim 12 , wherein the host includes a memory management unit configured to translate the particular virtual memory address to the physical address. 
     
     
         16 . The apparatus of  claim 12 , wherein a runtime environment of the memory device is configured to translate the particular virtual memory address to the physical address. 
     
     
         17 . A non-transitory computer readable medium storing instructions executable by a processor to:
 load, at runtime by an application, a library including a virtual register file into the main memory of the host; and   translate a particular virtual memory address, which targets the virtual register file as though it was the physical register, to a physical address of the memory device for a logical operation to be performed by the memory device without use of the physical register.   
     
     
         18 . The medium of  claim 17 , further including instructions to create, at runtime, the virtual register file including virtual memory addresses of memory device elements. 
     
     
         19 . The medium of  claim 18 , further including instructions to relocate the application in the main memory without editing the virtual register file. 
     
     
         20 . The medium of  claim 17 , further including instructions to translate the particular virtual memory address to the physical address via a memory management unit.