Direct data transfer in memory and between devices of a memory module

Abstract

The present disclosure includes apparatuses and methods related to direct data transfer in memory. An example apparatus can include a first number of memory devices coupled to a host via a respective first number of ports and a second number of memory devices coupled to the first number of memory device via a respective second number of ports, wherein first number of memory devices and the second number of memory devices are configured to transfer data based on a first portion of a command including instructions to read the data from first number of memory devices and send the data directly to the second number of devices and a second portion of the command that includes instructions to write the data to the second number of memory devices

What is claimed is: 
     
         1 . An apparatus, comprising:
 a first number of memory devices coupled to a host via a respective first number of ports; and   a second number of memory devices coupled to the first number of memory device via a respective second number of ports,
 wherein first number of memory devices and the second number of memory devices are configured to transfer data based on a first portion of a command including instructions to read the data from first number of memory devices and send the data directly to the second number of devices and a second portion of the command that includes instructions to write the data to the second number of memory devices. 
   
     
     
         2 . The apparatus of  claim 1 , wherein the first number of memory devices are configured to receive the first portion of the command from a controller via a register clock driver (RCD). 
     
     
         3 . The apparatus of  claim 1 , wherein the second number of devices are configured to receive the second portion of the command from a controller. 
     
     
         4 . The apparatus of  claim 1 , wherein the second number of devices are configured to execute the second portion of the command in response to the first number of memory devices executing the first portion of the command. 
     
     
         5 . The apparatus of  claim 1 , wherein the first number of memory devices and the second number of memory devices are FeRAM memory devices. 
     
     
         6 . The apparatus of  claim 1 , wherein the second portion of the command is executed during a clock cycle that immediately follows completion of the first portion of the command. 
     
     
         7 . The apparatus of  claim 1 , wherein the data is transferred on a bus directly from the first memory device to the second memory device. 
     
     
         8 . The apparatus of  claim 1 , wherein the controller on the memory module is configured to send another command to the second memory device instructing the second memory device to transfer the data from the second memory device to a host. 
     
     
         9 . The apparatus of  claim 1 , wherein the controller on the memory module is configured to send another command to the second memory device instructing the second memory device to transfer the data from the first memory device to a host. 
     
     
         10 . An apparatus, comprising:
 a memory module, wherein the memory module includes a first memory device coupled to a second memory device, wherein the first memory device is coupled to a controller and the second memory device is coupled to the controller, wherein the memory module is coupled to a host, and wherein the controller on the memory module is configured to:
 receive a command from the host including instructions to transfer data from the first memory device; and 
 send a read command to the first memory device instructing the first memory device to transfer the data from the first memory device to the second memory device; and 
 send a write command to the second memory device instructing the second memory device to write the data received from the first memory device to the second memory device. 
   
     
     
         11 . The apparatus of  claim 10 , wherein the memory module is configured to transfer data between the first memory device and the host while executing the command. 
     
     
         12 . The apparatus of  claim 10 , wherein the write command is executed during a clock cycle that immediately follows completion of the read command. 
     
     
         13 . The apparatus of  claim 10 , wherein the data is transferred on a bus directly from the first memory device to the second memory device. 
     
     
         14 . The apparatus  claim 10 , wherein the controller on the memory module is configured to send another read command to the second memory device instructing the second memory device to transfer the data from the second memory device to the host. 
     
     
         15 . A method, comprising:
 receiving a read command from a controller of a dual in-line memory module (DIMM);   receiving a write command from the controller of the DIMM;   reading data from a first memory device of the DIMM in response to receiving the read command from the controller of the DIMM; and   writing the data to the second memory device of the DIMM in response to receiving the write command from the controller and based at least in part on receiving the data from the first memory device.   
     
     
         16 . The method of  claim 15 , further including reading the data from the second memory device and sending the data to a host in response to receiving another read command from the controller. 
     
     
         17 . The method of  claim 15 , further including reading the data from the first memory device and writing the data to the second memory device in response to receiving a read request from a host. 
     
     
         18 . The method of  claim 15 , wherein sending the data to the second memory device includes sending the data from the first memory device to the second memory device on a bus and bypassing other memory devices or controllers coupled to the bus. 
     
     
         19 . The method of  claim 15 , wherein sending the data to the second memory device includes storing the data in a buffer on the second memory device. 
     
     
         20 . The method of  claim 15 , further including transferring other data between the second memory device and a host while reading the data from the first memory device.