US2021166631A1PendingUtilityA1

Display Device

Assignee: SEMICONDUCTOR ENERGY LABPriority: May 12, 2000Filed: Dec 10, 2020Published: Jun 3, 2021
Est. expiryMay 12, 2020(expired)· nominal 20-yr term from priority
G09G 3/3225G09G 3/3258H10K 59/8052H10K 59/1315H10D 86/441H10D 86/60G09G 2320/0223G09G 2320/0214G09G 3/3241G09G 3/30G09G 2300/0426G09G 2310/0291G09G 2330/021H01L 51/5221H01L 27/3276H01L 27/3279H01L 27/3244H01L 27/124H01L 27/3248H01L 2251/5353H01L 27/3262H10K 50/82H10K 59/1213H10K 59/12H10K 59/131H10K 59/123H10K 2102/321
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Claims

Abstract

There is provided an active matrix EL display device that can display a clear multi gray-scale color display to reduce the shift in the potential caused by the potential drop due to the wiring resistance of a power source supply line, in order to decrease the unevenness in a display region. A plurality of drawing out ports of the power source supply line are arranged. Further, in the wiring resistance between the external input terminal and the pixel portion power source supply line, potential compensation is performed by supplying potential to the power source supply line by a feedback amplifier. Further, in addition to above structure, the power source supply line may be arranged in a matrix.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A display device comprising:
 a plurality of source signal lines over an insulating surface;   a plurality of gate signal lines crossing said plurality of source signal lines;   a plurality of power supply lines comprising a plurality of first power supply lines and a plurality of second power supply lines along said plurality of gate signal lines or said plurality of source signal lines;   a plurality of pixels disposed in a matrix-form over said insulating surface, each of said plurality of pixels has an EL element, a thin film transistor for switching and a thin film transistor for driving said EL element; and   a first and a second input portions, said first input portion having at least one external input terminal connected to said plurality of first power supply lines and said second input portion having a plurality of at least one external input terminal connected to said plurality of second power supply lines;   wherein said first and said second input portions are located separately.

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