US2021159328A1PendingUtilityA1
Method of manufacturing semiconductor device and semiconductor device
Assignee: SUMITOMO ELECTRIC INDUSTRIESPriority: Nov 25, 2019Filed: Nov 20, 2020Published: May 27, 2021
Est. expiryNov 25, 2039(~13.3 yrs left)· nominal 20-yr term from priority
Inventors:Shigeki Yoshida
H10P 14/24H10P 14/3416H10P 14/3251H10P 14/3238H10P 14/3216H10D 62/8503H10D 62/824H10D 30/015H10D 30/475H10D 62/151H10D 30/4755H10D 64/62H10D 62/85H10D 64/251H10D 64/01H10D 30/4732H10D 30/472H01L 29/205H01L 29/7783H01L 29/2003H01L 29/66462
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Claims
Abstract
A method of manufacturing a semiconductor device comprises steps of: forming a semiconductor stack by growing an AlGaN layer or an InAlN layer, an AlN layer, and a GaN layer on a substrate in this order; forming a recess in the semiconductor stack by a dry etching from a surface of the semiconductor stack, the surface being opposite to the substrate; growing a GaN region in the recess; and forming an ohmic electrode on the GaN region; wherein in the forming of the recess, the dry etching is stopped in response to the recess reaching the AlN layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of manufacturing a semiconductor device, comprising steps of:
forming a semiconductor stack by growing an AlGaN layer or an InAlN layer, an AlN layer, and a GaN layer on a substrate in this order; forming a recess in the semiconductor stack by dry etching the semiconductor stack from a surface thereof which is opposite to the substrate; growing a GaN region in the recess; and forming an ohmic electrode on the GaN region, wherein in the forming of the recess, the dry etching is stopped in response to the recess reaching the AlN layer.
2 . The method of manufacturing the semiconductor device according to claim 1 , further comprising a step of:
forming a mask on the surface of the semiconductor stack after the forming of the semiconductor stack and before the forming of the recess, the mask having an opening corresponding to the recess, wherein in the forming of the recess, the recess is formed in the semiconductor stack by the dry etching the semiconductor stack through the opening of the mask, and wherein in the step of growing the GaN region, the GaN region is grown in the recess exposed through the opening of the mask.
3 . The method of manufacturing the semiconductor device according to claim 1 , wherein in the forming of the recess, the semiconductor stack is dry-etched in a mixed atmosphere containing H 2 and NH 3 , and the mixed atmosphere is set at 900° C. or higher.
4 . The method of manufacturing the semiconductor device according to claim 3 , wherein in the forming of the recess, the mixed atmosphere is set to a temperature of 950° C. or more and 1050° C. or less.
5 . The method of manufacturing the semiconductor device according to claim 3 , wherein in the forming of the recess, a ratio F 2 /F 1 of a flow rate F 2 of NH 3 to a flow rate F 1 of H 2 in the mixed atmosphere is 0.8 or more and 1.2 or less.
6 . The method of manufacturing the semiconductor device according to claim 1 , wherein the forming of the recess and the growing of the GaN region are performed in a same furnace.
7 . The method of manufacturing the semiconductor device according to claim 6 , wherein the forming of the recess and the growing of the GaN region are performed continuously.
8 . The method of manufacturing the semiconductor device according to claim 1 , wherein the growing of the GaN region is to dope the GaN region with an n-type impurity.
9 . The method of manufacturing the semiconductor device according to claim 1 , wherein the ohmic electrode is a source electrode or a drain electrode of a transistor.
10 . A semiconductor device comprising:
a substrate; an AlGaN layer or an InAlN layer provided on the substrate; an AlN layer provided on the AlGaN layer or the InAlN layer; a GaN layer provided on the AlN layer; a pair of GaN regions which is provided on the AlN layer, sandwiches a portion of the GaN layer and is formed on a surface of the AlN layer; a pair of ohmic electrodes which is provided on the pair of GaN regions and makes ohmic contacts with each of the pair of GaN regions; and a gate electrode provided between the pair of ohmic electrodes on the GaN layer.
11 . The device according to claim 10 , wherein each surface of the AlGaN layer or the InAlN layer, the AlN layer, and the GaN layer, which is opposite to the substrate, is an N-polar surface.
12 . A semiconductor device comprising:
a substrate; a barrier layer provided on the substrate; a stopper layer provided on the barrier layer; a channel layer provided on the stopper layer; a source region and a drain region which are adjacent to the channel layer, sandwich a portion of the channel layer; a source electrode and a drain electrode respectively provided on the source region and the drain region; and a gate electrode provided between the source electrode and the drain electrode, wherein the barrier layer is an AlGaN layer or an InAlN layer, the stopper layer is an AlN layer, the channel layer is a GaN layer, the source region and the drain region are GaN regions, and wherein the channel layer and the source region and the drain region is formed on a surface of the stopper layer.Join the waitlist — get patent alerts
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