Trench-type insulated gate semiconductor device including an emitter trench and an overlapped floating region

Abstract

A semiconductor device of the present invention includes a semiconductor layer, a plurality of gate trenches formed in the semiconductor layer, a gate electrode filled via a gate insulating film in the plurality of gate trenches, an n+-type emitter region, a p-type base region, and an n−-type drift region disposed, lateral to each gate trench, in order in a depth direction of the gate trench from a front surface side of the semiconductor layer, a p+-type collector region disposed on a back surface side of the semiconductor layer with respect to the n−-type drift region, a plurality of emitter trenches formed between the plurality of gate trenches adjacent to each other, a buried electrode filled via an insulating film in the plurality of emitter trenches, and electrically connected with the n+-type emitter region, and a p-type floating region formed between the plurality of emitter trenches, and the p-type floating region is formed deeper than the p-type base region, and includes an overlap portion that goes around to a lower side of an emitter trench closest to the gate trench out of the plurality of emitter trenches and has an end portion positioned on a side closer to the gate trench with respect to a center in a width direction of the emitter trench.

1 . A semiconductor device comprising:
 a semiconductor layer;   a trench formed in the semiconductor layer;   an embedded electrode filled via an insulating film in the trench;   a first region of a first conductivity type, a second region of a second conductivity type, and a third region of the first conductivity type having an impurity concentration lower than that of the first region, the first region, the second region and the third region disposed laterally to the trench, in order in a depth direction of the trench from a front surface side of the semiconductor layer, and the second region having a bottom portion which is positioned at the shallower level than a bottom portion of the trench;   a floating region of the second conductivity type formed at the opposite side to the second region with respect to the trench, the floating region having a depth deeper than that of the second region;   a contact trench having a bottom portion reaching the second region from the front surface side of the semiconductor layer, the contact trench having a flat bottom surface which is positioned at the approximately same level as a bottom surface of the first region;   a contact region of the second conductivity having an impurity concentration higher than that of the second region formed in the bottom portion of the contact trench;   a surface electrode formed over the front surface of the semiconductor layer such that the surface electrode is in the contact trench, the surface electrode being in contact with the first region at a side surface of the contact trench and being in contact with the contact region at a bottom surface of the contact trench.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising:
 a second trench formed in the semiconductor layer, the floating region disposed laterally to the second trench;   an impurity region of the first conductivity type continuous from the third region, the impurity region being sandwiched between the second trench and another trench formed in the semiconductor layer.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein the floating region is formed deeper than the trench. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein
 the insulating film has an extended portion extending outside the trench, and   the extended portion covers the first region at the front surface of the semiconductor layer.   
     
     
         5 . The semiconductor device according to  claim 4 , wherein the extended portion of the insulating film has an end surface continuous from a side surface of the contact trench. 
     
     
         6 . The semiconductor device according to  claim 5 , further comprising an interlayer film formed over the semiconductor layer, an opening having a side surface continuous from the end surface of the extended portion is formed in the interlayer film, wherein
 the surface electrode extends into the contact trench through the opening from a region above the interlayer film.   
     
     
         7 . The semiconductor device according to  claim 6 , wherein the contact region spreads laterally from an end portion of the bottom portion of the contact trench in a width direction of the contact trench. 
     
     
         8 . The semiconductor device according to according to  claim 7 , wherein the surface electrode has a concave portion above the contact trench. 
     
     
         9 . The semiconductor device according to  claim 8 , wherein a second concave portion is formed at an upper surface of the embedded electrode in the trench, the second concave portion being concave with respect to the front surface of the semiconductor layer in a depth direction of the trench. 
     
     
         10 . The semiconductor device according to  claim 9  further comprising:
 a fourth region of the second conductivity type formed on a back surface side of the semiconductor layer with respect to the third region; 
 a buffer region of the first conductivity type having an impurity concentration higher than that of the third region formed between the third region and the fourth region. 
 
     
     
         11 . The semiconductor device according to  claim 10 , wherein the first conductivity type is an n-type and the second conductivity type is a p-type. 
     
     
         12 . The semiconductor device according to  claim 1 , wherein the flat bottom surface of the contact trench is slightly lower level than the bottom surface of the first region. 
     
     
         13 . The semiconductor device according to  claim 12 , wherein a side wall of tops of the contact trench is in contact with the second region. 
     
     
         14 . The semiconductor device according to  claim 13 , further comprising:
 a second trench formed in the semiconductor layer, the floating region disposed laterally to the second trench;   an impurity region of the first conductivity type continuous from the third region, the impurity region being sandwiched between the second trench and another trench formed in the semiconductor layer.   
     
     
         15 . The semiconductor device according to  claim 13 , wherein the floating region is formed deeper than the trench. 
     
     
         16 . The semiconductor device according to  claim 13 , wherein
 the insulating film has an extended portion extending outside the trench, and   the extended portion covers the first region at the front surface of the semiconductor layer.   
     
     
         17 . The semiconductor device according to  claim 16 , wherein the extended portion of the insulating film has an end surface continuous from a side surface of the contact trench. 
     
     
         18 . The semiconductor device according to  claim 17 , further comprising an interlayer film formed over the semiconductor layer, an opening having a side surface continuous from the end surface of the extended portion is formed in the interlayer film, wherein
 the surface electrode extends into the contact trench through the opening from a region above the interlayer film.   
     
     
         19 . The semiconductor device according to  claim 18 , wherein the contact region spreads laterally from an end portion of the bottom portion of the contact trench in a width direction of the contact trench. 
     
     
         20 . The semiconductor device according to according to  claim 19 , wherein the surface electrode has a concave portion above the contact trench.