High voltage semiconductor device

Abstract

A high voltage semiconductor device and a manufacturing method thereof are provided in the present invention. A recess is formed in a semiconductor substrate, and a gate dielectric layer and a main gate structure are formed in the recess. Therefore, the high voltage semiconductor device formed by the manufacturing method of the present invention may include the main gate structure lower than a top surface of an isolation structure formed in the semiconductor substrate. Problems about integrated manufacturing processes of the high voltage semiconductor device and other kinds of semiconductor devices when the gate structure is relatively high because of the thicker gate dielectric layer required in the high voltage semiconductor device may be improved accordingly.

What is claimed is: 
     
         1 . A high voltage semiconductor device, comprising:
 a semiconductor substrate;   two isolation structures disposed in the semiconductor substrate;   a gate dielectric layer disposed between the two isolation structures, wherein the gate dielectric layer is lower than a topmost surface of each of the two isolation structures; and   a main gate structure disposed on the gate dielectric layer and the two isolation structures, wherein at least a part of a top surface of the main gate structure is lower than the topmost surface of each of the two isolation structures.   
     
     
         2 . The high voltage semiconductor device of  claim 1 , wherein the main gate structure comprises a polysilicon gate structure. 
     
     
         3 . The high voltage semiconductor device of  claim 1 , further comprising:
 two source/drain regions disposed in the semiconductor substrate and disposed at outer ends of the two isolation structures respectively.