Semiconductor device and method for fabricating the same

Abstract

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first semiconductor unit having a first threshold voltage and including a first insulating stack in the substrate, a second semiconductor unit having a second threshold voltage and including a second insulating stack in the substrate, and a third semiconductor unit having a third threshold voltage and including a third insulating stack in the substrate. The first threshold voltage, the second threshold voltage, and the third threshold voltage are different from each other. A thickness of the first insulating stack is different from a thickness of the second insulating stack and a thickness of the third insulating stack. The thickness of the second insulating stack is different from the thickness of the third insulating stack.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate;   a first semiconductor unit having a first threshold voltage and comprising a first insulating stack positioned in the substrate;   a second semiconductor unit having a second threshold voltage and comprising a second insulating stack positioned in the substrate; and   a third semiconductor unit having a third threshold voltage and comprising a third insulating stack positioned in the substrate;   wherein the first threshold voltage, the second threshold voltage, and the third threshold voltage are different from each other; a thickness of the first insulating stack is different from a thickness of the second insulating stack and a thickness of the third insulating stack; and the thickness of the second insulating stack is different from the thickness of the third insulating stack.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the first insulating stack comprises a first bottom insulating layer inwardly positioned in the substrate, and the third insulating stack comprises a third bottom insulating layer inwardly positioned in the substrate and a third top insulating layer positioned on the third bottom insulating layer. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the second insulating stack comprises a second bottom insulating layer inwardly positioned in the substrate, a second middle insulating layer positioned on the second bottom insulating layer, and a second top insulating layer positioned on the second middle insulating layer. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the first semiconductor unit further comprises a first bottom conductive layer positioned on the first bottom insulating layer, and the first bottom conductive layer has a thickness between about 10 angstroms and about 200 angstroms. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the first semiconductor unit further comprises a first top conductive layer positioned on the first bottom conductive layer, and the first top conductive layer has a thickness between about 10 angstroms and about 100 angstroms. 
     
     
         6 . The semiconductor device of  claim 5 , wherein the first semiconductor unit further comprises a first filler layer positioned on the first top conductive layer, and the first filler layer is formed of tungsten or aluminum. 
     
     
         7 . The semiconductor device of  claim 3 , wherein the second semiconductor unit further comprises a second bottom conductive layer positioned on the second top insulating layer, and the second bottom conductive layer has a thickness between about 10 angstroms and about 100 angstroms. 
     
     
         8 . The semiconductor device of  claim 7 , wherein the second semiconductor unit further comprises a second top conductive layer positioned on the second bottom conductive layer, and the second top conductive layer has a thickness between about 10 angstroms and about 200 angstroms. 
     
     
         9 . The semiconductor device of  claim 3 , wherein the second semiconductor unit further comprises a second pair of stress regions attached to lower portions of the two sides of the second semiconductor unit, and the second pair of stress regions are formed of silicon carbide. 
     
     
         10 . The semiconductor device of  claim 3 , wherein the third semiconductor unit further comprises a third bottom conductive layer positioned on the third top insulating layer, and the third bottom conductive layer has a thickness between about 10 angstroms and about 100 angstroms. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the third semiconductor unit further comprises a third top conductive layer positioned on the third bottom conductive layer, and the third top conductive layer has a thickness between about 10 angstroms and about 200 angstroms. 
     
     
         12 . The semiconductor device of  claim 11 , wherein the third semiconductor unit further comprises a third filler layer positioned on the third top conductive layer and a third capping layer positioned on the third filler layer. 
     
     
         13 . The semiconductor device of  claim 8 , wherein the second semiconductor unit further comprises a second interfacial layer positioned between the substrate and the second bottom insulating layer, and the second interracial layer has a thickness less than 2 nm. 
     
     
         14 . The semiconductor device of  claim 8 , wherein the second semiconductor unit further comprises a second functional layer positioned between the second top insulating layer and the second bottom conductive layer, and the second functional layer has a thickness between about 10 angstroms and about 15 angstroms. 
     
     
         15 . The semiconductor device of  claim 8 , wherein the second semiconductor unit further comprises a second dipole layer positioned between the substrate and the second bottom insulating layer, and the second dipole layer is formed of a material including one or more of lutetium oxide, lutetium silicon oxide, yttrium oxide, yttrium silicon oxide, lanthanum oxide, lanthanum silicon oxide, barium oxide, or barium silicon oxide. 
     
     
         16 . The semiconductor device of  claim 8 , wherein the second semiconductor unit further comprises a second protection layer positioned between the second top insulating layer and the second bottom conductive layer, and the second protection layer is formed of titanium nitride. 
     
     
         17 . The semiconductor device of  claim 8 , wherein the second semiconductor unit further comprises a second encapsulation layer positioned between the second filler layer and the second top conductive layer, and the second encapsulation layer has a thickness between about 15 angstroms and about 25 angstroms. 
     
     
         18 . A method for fabricating a semiconductor device, comprising:
 providing a substrate; and   concurrently forming a first semiconductor unit, a second semiconductor unit, and a third semiconductor unit in the substrate;   wherein the first semiconductor unit comprises a first insulating stack, the second semiconductor unit comprises a second insulating stack, and the third semiconductor unit comprises a third insulating stack; and thicknesses of the first insulating stack, the second insulating stack, and the third insulating stack are all different.   
     
     
         19 . The method for fabricating the semiconductor device of  claim 18 , further comprising forming a plurality of trenches in the substrate and forming a first insulating film over the substrate and in the plurality of trenches. 
     
     
         20 . The method for fabricating the semiconductor device of  claim 19 , further comprising removing portions of the first insulating film and forming a second insulating film over the substrate.