US2021118697A1PendingUtilityA1

Methods of Manufacturing Semiconductor Devices

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jun 29, 2018Filed: Dec 7, 2020Published: Apr 22, 2021
Est. expiryJun 29, 2038(~11.9 yrs left)· nominal 20-yr term from priority
H10W 74/00H10W 90/754H10W 70/611H10W 90/701H10W 70/685H10W 74/117H10W 74/10H10W 74/129H10P 72/7436H10P 72/74H10W 90/722H10W 70/6528H10W 70/60H10W 90/00H10W 74/111H10W 74/016H10W 70/614H10W 70/65H10W 70/09H10W 70/05H10W 95/00H10W 70/095H10P 72/744H10P 72/743H10P 72/7424H10P 76/2041H10P 76/202H10P 76/2042H10W 70/093G03F 7/40G03F 7/11H01L 25/50H01L 23/5389H01L 2225/1058H01L 23/3107H01L 2225/1035H01L 2224/214H01L 21/565H01L 24/19H01L 25/105H01L 23/5383H01L 23/5386H01L 2221/68372H01L 24/20H01L 21/6835H01L 21/4857H01L 21/4853H10W 20/042H10W 20/089H10P 95/90H10P 14/46H10P 76/204
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Claims

Abstract

A semiconductor device and method of making a conductive connector is provided. In an embodiment an opening is formed within a photoresist by adjusting the center point of an in-focus area during the exposure process. Once the photoresist has been developed to form an opening, an after development baking process is utilized to reshape the opening. Once reshaped, a conductive material is formed into the opening to take on the shape of the opening.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 an encapsulant encapsulating a semiconductor device and a through via, wherein the through via extends from a first side of the encapsulant to a second side of the encapsulant;   a redistribution layer over the encapsulant; and   an external connector electrically connected to the redistribution layer, wherein the external connector has a flare angle of between about 45° and about 85°, the flare angle extending from a first sidewall within a passivation layer to a second sidewall parallel with the first sidewall.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the through via comprises a seed layer. 
     
     
         3 . The semiconductor device of  claim 1 , further comprising a solder ball in physical contact with the external connector, the solder ball having an elliptical shape. 
     
     
         4 . The semiconductor device of  claim 1 , further comprising a solder ball in physical contact with the external connector, the solder ball having a round shape. 
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a passivation layer over the encapsulant; and   a seed layer located between the external connector and the passivation layer, the seed layer having a straight sidewall perpendicular to a surface of the passivation layer.   
     
     
         6 . The semiconductor device of  claim 5 , wherein a distance from the first sidewall and the second sidewall, in a direction perpendicular to the surface of the passivation layer, is between about 0.5 μm and about 11 μm. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the external connector is a copper pillar. 
     
     
         8 . A semiconductor device comprising:
 an external connector comprising:
 a first sidewall; 
 a second sidewall parallel with the first sidewall; and 
 a connecting sidewall connecting the first sidewall and the second sidewall, the connecting sidewall having a flare angle of between about 10° and about 85° ; 
   a redistribution layer electrically connected to the external connector;   a semiconductor die electrically connected to the redistribution layer;   a through via electrically connected to the redistribution layer; and   an encapsulant encapsulating the semiconductor die and the through via.   
     
     
         9 . The semiconductor device of  claim 8 , wherein the external connector is a copper pillar. 
     
     
         10 . The semiconductor device of  claim 8 , further comprising a seed layer located between the external connector and the redistribution layer. 
     
     
         11 . The semiconductor device of  claim 10 , further comprising a passivation layer adjacent to the seed layer, the seed layer having a straight sidewall perpendicular to a surface of the passivation layer, the straight sidewall extending from the passivation layer to the external connector. 
     
     
         12 . The semiconductor device of  claim 8 , further comprising a solder ball in physical contact with the external connector, the solder ball having a round shape. 
     
     
         13 . The semiconductor device of  claim 8 , further comprising a solder ball in physical contact with the external connector, the solder ball having an elliptical shape. 
     
     
         14 . The semiconductor device of  claim 8 , wherein the through via comprises a seed layer and a bulk layer, the bulk layer in physical contact with the redistribution layer. 
     
     
         15 . A semiconductor device comprising:
 a semiconductor die;   an encapsulant encapsulating the semiconductor die;   a through encapsulant via extending from a first side of the encapsulant to a second side of the encapsulant;   a passivation layer over the encapsulant; and   an external connector over the encapsulant, the external connector comprising:
 a first portion with a first width, the first portion extending through the passivation layer; 
 a second portion with a second width larger than the first width, the second portion being located outside of the passivation layer; and 
 a tapered portion extending from the second portion to the first portion. 
   
     
     
         16 . The semiconductor device of  claim 15 , wherein the tapered portion is located at a tapered angle to a line, the line being parallel with a major surface of the encapsulant, the tapered angle being between about 10° and about 85°. 
     
     
         17 . The semiconductor device of  claim 15 , further comprising a solder ball in physical contact with the external connector, the solder ball having an oval shape. 
     
     
         18 . The semiconductor device of  claim 17 , further comprising a solder ball in physical contact with the external connector, the solder ball having a round shape. 
     
     
         19 . The semiconductor device of  claim 15 , further comprising a seed layer located between the external connector and the passivation layer, the seed layer having a straight sidewall perpendicular to a surface of the passivation layer. 
     
     
         20 . The semiconductor device of  claim 15 , further comprising a redistribution layer located between the external connector and the encapsulant.

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