Use of outstanding command queues for separate read-only cache and write-read cache in a memory sub-system

Abstract

A request to read data stored at a memory sub-system can be received. A determination can be made whether the data is stored at a cache of the memory sub-system. responsive to determining that the data is not stored at the cache of the memory sub-system, a determination can be made, by a processing device, of a queue of a set of queues to store the request with other read requests for the data stored at the memory sub-system. Each queue of the et of queues corresponds to a respective cache line of the cache. The request can be stored at the determined queue with the other read requests for the data stored at the memory sub-system.

What is claimed is: 
     
         1 . A memory sub-system comprising:
 a first cache associated with a first type of memory access workload;   a second cache associated with a second type of memory access workload;   a first queue corresponding to the first cache, wherein the first queue is to store first requests for first data corresponding to the first type of memory access workload when said first data is not stored in the first cache; and   a second queue corresponding to the second cache, wherein the second queue is to store second requests for second data corresponding to the second type of memory access workload when said second data is not stored in the second cache.   
     
     
         2 . The memory sub-system of  claim 1 , wherein the first type of memory access workload is associated with sequential memory access operations. 
     
     
         3 . The memory sub-system of  claim 1 , wherein the second type of memory access workload is associated with random memory access operations. 
     
     
         4 . The memory sub-system of  claim 1 , further comprising:
 a first content addressable memory (CAM) corresponding to the first cache, the first CAM to store identifiers of third data stored in the first cache; and   a second CAM corresponding to the second cache, the second CAM to store identifiers of fourth data stored in the second cache.   
     
     
         5 . The memory sub-system of  claim 1 , wherein the first queue and the second queue comprise first-in, first-out (FIFO) queues. 
     
     
         6 . The memory sub-system of  claim 1 , further comprising:
 a first plurality of queues comprising the first queue, wherein each queue of the first plurality of queues corresponds to a respective cache line in the first cache; and   a second plurality of queues comprising the second queue, wherein each queue of the second plurality of queues corresponds to a respective cache line in the second cache.   
     
     
         7 . The memory sub-system of  claim 6 , further comprising:
 a third queue to store received requests for data when the first queue and the second queue are full.   
     
     
         8 . A system comprising:
 a memory device; and   a processing device, operatively coupled to the memory device, to perform operations comprising:
 receiving a memory access request associated with data stored at the memory device; 
 determining a type of a memory access workload based on the request; 
 determining whether the data is stored at one of a first cache associated with a first type of memory access workload or a second cache associated with a second type of memory access workload; 
 responsive to determining that the data is not stored at the one of the first cache or the second cache, identifying one of a first queue corresponding to the first cache or a second queue corresponding to the second cache, the one of the first queue or the second queue corresponding to the one of the first cache or the second cache to store the memory access request; and 
 storing the memory access request at the determined one of the first queue or the second queue. 
   
     
     
         9 . The system of  claim 8 , wherein the first queue is to store first requests for first data corresponding to the first type of memory access workload when said first data is not stored in the first cache, and wherein the second queue is to store second requests for second data corresponding to the second type of memory access workload when said second data is not stored in the second cache. 
     
     
         10 . The system of  claim 8 , wherein the first type of memory access workload is associated with sequential memory access operations. 
     
     
         11 . The system of  claim 8 , wherein the second type of memory access workload is associated with random memory access operations. 
     
     
         12 . The system of  claim 8 , wherein determining whether the data is stored at the one of the first cache or the second cache comprises determining whether a respective one of a first content addressable memory (CAM) corresponding to the first cache or a second CAM corresponding to the second cache includes an identifier associated with the data. 
     
     
         13 . The system of  claim 8 , wherein the first queue and the second queue comprise first-in, first-out (FIFO) queues. 
     
     
         14 . The system of  claim 8 , wherein the first queue is one of a first plurality of queues each corresponding to a respective cache line in the first cache, and wherein the second queue is one of a second plurality of queues each corresponding to a respective cache line in the second cache. 
     
     
         15 . The system of  claim 14 , wherein the processing device to perform further operations comprising:
 determining that the first queue and the second queue are full; and   storing received requests for data in a third queue until space is available in one of the first queue and the second queue.   
     
     
         16 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
 receiving a memory access request associated with data stored at a memory device;   determining a type of a memory access workload based on the request;   determining whether the data is stored at one of a first cache associated with a first type of memory access workload or a second cache associated with a second type of memory access workload;   responsive to determining that the data is not stored at the one of the first cache or the second cache, identifying one of a first queue corresponding to the first cache or a second queue corresponding to the second cache, the one of the first queue or the second queue corresponding to the one of the first cache or the second cache to store the memory access request; and   storing the memory access request at the determined one of the first queue or the second queue.   
     
     
         17 . The non-transitory computer-readable storage medium of  claim 16 , wherein the first queue is to store first requests for first data corresponding to the first type of memory access workload when said first data is not stored in the first cache, and wherein the second queue is to store second requests for second data corresponding to the second type of memory access workload when said second data is not stored in the second cache. 
     
     
         18 . The non-transitory computer-readable storage medium of  claim 16 , wherein the first type of memory access workload is associated with sequential memory access operations. 
     
     
         19 . The non-transitory computer-readable storage medium of  claim 16 , wherein the second type of memory access workload is associated with random memory access operations. 
     
     
         20 . The non-transitory computer-readable storage medium of  claim 16 , wherein determining whether the data is stored at the one of the first cache or the second cache comprises determining whether a respective one of a first content addressable memory (CAM) corresponding to the first cache or a second CAM corresponding to the second cache includes an identifier associated with the data.