On-chip heater

Abstract

An on-chip heater in a concentric rings configuration having non-uniform spacing between heating elements provides improved radial temperature uniformity and low power consumption compared to circular or square heating elements. On-chip heaters are suitable for integration and use with on-chip sensors that require tight temperature control.

What is claimed is: 
     
         1 . A method, comprising:
 forming a dual-gate back-side sensing field effect transistor (DG-BSS FET), wherein the forming the DG-BSS FET comprises:
 forming a primary gate stack and a secondary gate stack on vertically opposing surfaces of a common channel region, 
 wherein the forming the primary gate stack comprises forming a first gate dielectric on a first surface of the common channel region, and forming a first gate electrode over the first gate dielectric, and 
 wherein the forming the secondary gate stack comprises forming a second gate dielectric on the second surface of the common channel region and disposing a capture reagent on the second gate dielectric, and 
 forming a first source/drain and a second source/drain laterally separated from each other by the common channel region; 
   forming a heater in a dielectric layer below the primary gate stack,   wherein the forming the heater comprises forming concentrically-arranged heating elements with a first distance between a first pair of adjacent inner heating elements greater than a second distance between a second pair of adjacent outer heating elements, and   wherein the first pair of adjacent inner heating elements is separated from the second pair of adjacent outer heating elements by a third distance that is smaller than the first distance and greater than the second distance; and   forming a temperature sensor in thermal communication with the DG-BSS FET.   
     
     
         2 . The method of  claim 1 , wherein each of the concentrically-arranged heating elements comprises a resistor. 
     
     
         3 . The method of  claim 2 , wherein the resistor comprises TiAlN. 
     
     
         4 . The method of  claim 2 , wherein the resistor comprises a silicide. 
     
     
         5 . The method of  claim 2 , wherein the resistor comprises polysilicon. 
     
     
         6 . The method of  claim 1 , wherein the second gate dielectric layer comprises HfO 2 . 
     
     
         7 . The method of  claim 1 , wherein each pair of concentrically-arranged heating elements that is electrically connected has a same nominal resistance. 
     
     
         8 . The method of  claim 1 , wherein the capture reagent comprises a biological molecule. 
     
     
         9 . The method of  claim 1 , wherein the each pair of concentrically-arranged heating elements that is electrically connected has more than one electrical connection point. 
     
     
         10 . The method of  claim 1 , wherein the heater has an operating temperature ranging from room temperature to 300° C. 
     
     
         11 . The method of  claim 1 , wherein the heater is configured to maintain a temperature gradient across its surface area less than or equal to 1.5° C. 
     
     
         12 . A method, comprising:
 forming a first gate on a first surface of a channel region, wherein the forming the first gate comprises forming a first gate dielectric on the first surface of the channel region, and forming a first gate electrode over the first gate dielectric;   forming a second gate on a second surface of the channel region, wherein the forming the second gate comprises forming a second gate dielectric on the second surface of the channel region, and disposing a capture reagent on the second gate dielectric;   forming a heater in a dielectric layer below the first gate,   wherein the forming the heater comprises forming concentrically-arranged heating elements with a first distance between a first pair of adjacent inner heating elements greater than a second distance between a second pair of adjacent outer heating elements, and   wherein the first pair of adjacent inner heating elements is separated from the second pair of adjacent outer heating elements by a third distance that is smaller than the first distance and greater than the second distance; and   forming a fluidic channel over the second gate.   
     
     
         13 . The method of  claim 12 , further comprising forming a temperature sensor within the substrate prior to the forming the second gate. 
     
     
         14 . The method of  claim 12 , wherein the heating elements are spaced apart from each other such that the heating elements have temperature differentials with respect to a thermal ground equal to each other. 
     
     
         15 . The method of  claim 12 , further comprising forming a multi-level interconnect structure within the dielectric layer, wherein an innermost heating element and an outermost heating element are connected to each other through an electrical connection of the multi-level interconnect structure. 
     
     
         16 . A method, comprising:
 forming a first gate on a first surface of a substrate;   forming a dielectric layer on the first gate;   forming a multi-level interconnect structure within the dielectric layer;   forming a heater within the dielectric layer below the first gate; and   forming a second gate on a second surface of the channel region after the forming the heater, wherein the second surface is opposite to the first surface and wherein a channel regions is formed within a portion of the substrate between the first and second gates.   
     
     
         17 . The method of  claim 16 , further comprising forming a via line on the multi-level interconnect structure through the substrate after the forming the second gate. 
     
     
         18 . The method of  claim 16 , further comprising forming a fluidic channel over the second gate. 
     
     
         19 . The method of  claim 16 , wherein the forming the multi-level interconnect structure comprises:
 forming a first portion of the multi-level interconnect structure prior to the forming the heater; and   forming a second portion of the multi-level interconnect structure after the forming the heater.   
     
     
         20 . The method of  claim 16 , wherein the forming the heater comprises forming concentrically-arranged heating elements with a first distance between a first pair of adjacent inner heating elements greater than a second distance between a second pair of adjacent outer heating elements, and wherein the first pair of adjacent inner heating elements is separated from the second pair of adjacent outer heating elements by a third distance that is smaller than the first distance and greater than the second distance.