Semiconductor device and method of manufacturing the same

Abstract

A semiconductor device has an impurity region covering a bottom of a gate trench and a column region. A bottom of the column region is deeper than a bottom of the gate trench. The impurity region is arranged between the gate trench and the column region. This structure can improve the characteristics of the semiconductor device.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate;   a first impurity region of a first conductivity type formed on the semiconductor substrate;   a second impurity region of a second conductivity type opposite to the first conductivity type formed on the first impurity region;   a first gate trench and a second gate trench penetrating the second impurity region to reach the first impurity region; gate electrodes embedded in the first gate trench and the second gate trench via a gate insulating film respectively;   a column region of the second conductivity type formed in the first impurity region between the first gate trench and the second gate trench; and   a third impurity region of the first conductivity type formed in the first impurity region covered a bottom portion of the first gate trench, wherein   a depth of a bottom portion of the column region is deeper than a depth of each of bottom portions of the first gate trench and the second gate trench, and   the third impurity region is formed between the first gate trench and the column region.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the third impurity region is in contact with a bottom surface of the first gate trench or the second gate trench and in contact with a side surface connecting with the bottom surface thereof.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein
 a bottom surface of the third impurity region is in contact with the first impurity region.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein
 an impurity density of the third impurity region is higher than an impurity density of the first impurity region.   
     
     
         5 . The semiconductor device according to  claim 1 , wherein
 the column region overlaps the third impurity region in plan view.   
     
     
         6 . A semiconductor device comprising:
 a semiconductor substrate;   a first impurity region of a first conductivity type formed on the semiconductor substrate;   a second impurity region of a second conductivity type opposite to the first conductivity type formed on the first impurity region;   a first gate trench and a second gate trench formed from the second impurity region to the first impurity region;   gate electrodes embedded in the first gate trench and the second gate trench via a gate insulating film respectively;   a column region of the second conductivity type formed in the first impurity region between the first gate trench and the second gate trench; and   a third impurity region of the first conductivity type formed in the first impurity region covered bottom portions of the first gate trench and the second gate trench, wherein   a depth of a bottom portion of the column region is deeper than a depth of each of bottom portions of the first gate trench and the second gate trench,   the third impurity region is formed between the first gate trench or the first gate trench and the column region, and   the third impurity region has a multi-stage structure extended toward the semiconductor substrate.   
     
     
         7 . The semiconductor device according to  claim 6 , wherein
 the third impurity region is in contact with a bottom surface of the first gate trench or the second gate trench and in contact with a side surface connecting with the bottom surface thereof.   
     
     
         8 . The semiconductor device according to  claim 6 , wherein
 a bottom surface of the third impurity region is in contact with the first impurity region.   
     
     
         9 . The semiconductor device according to  claim 6 , wherein
 an impurity density of the third impurity region is higher than an impurity density of the first impurity region.   
     
     
         10 . The semiconductor device according to  claim 6 , wherein
 the column region overlaps the third impurity region in plan view.   
     
     
         11 . A manufacturing method of a semiconductor device, comprising the steps of:
 (a) preparing a semiconductor substrate;   (b) forming a first impurity region of a first conductivity type on the semiconductor substrate by performing an epitaxial growth method;   (c) forming a first gate trench and a second gate trench to reach the first impurity region;   (d) forming a second impurity region of the first conductivity type in the first impurity region so as to cover a bottom portion of the first gate trench by performing ion implantation;   (e) forming a gate insulating film in each inside of the first gate trench and the second gate trench respectively;   (f) forming gate electrodes so as to embed in the first gate trench and the second gate trench via the gate insulating film;   (g) forming a third impurity region of a second conductivity type opposite to the first conductivity type in a top portion of the first impurity region so as to leave a bottom portion of the first impurity region, and forming a source region in the first impurity region, and the third impurity region and the source region are formed in this order; and   (h) forming a column region of the second conductivity type in the first impurity region between the first gate trench and the second gate trench by performing ion implantation, wherein   a depth of a bottom portion of the column region is deeper than a depth of each of bottom portions of the first gate trench and the second gate trench.   
     
     
         12 . The manufacturing method of the semiconductor device according to  claim 11 , wherein
 an impurity density of the second impurity region is higher than an impurity density of the first impurity region.   
     
     
         13 . The manufacturing method of the semiconductor device according to  claim 11 , wherein
 the column region overlaps the second impurity region in plan view.