Process for Making a Semiconductor System

Abstract

This application is directed to a system including a plurality of devices that are stacked one on top of another. Each device includes a substrate having two opposing surfaces. A first row of contacts is coupled on a first surface and includes a first contact and a second contact that are adjacent to each other. A second row of contacts is coupled on a respective second surface and includes a third contact. Each contact in the second row of contacts is physically aligned with an opposite contact in the first row. The third contact is disposed opposite and physically aligned with the first contact in the first row, and electrically coupled to the second contact in the first row. Operational circuitry is electrically coupled to at least the first contact on the first row, and at least two of the plurality of devices have distinct operational circuitry.

1 . A method for making a point-to-point interconnection system, comprising:
 providing a plurality of devices that are stacked one on top of another by, for each device that includes a respective substrate having a first surface and an opposing second surface:
 (1) forming a first row of contacts on the respective first surface, wherein the first row of contacts includes a first contact and a second contact that are adjacent to each other; 
 (2) forming a second row of contacts on the second surface, wherein each contact in the second row of contacts is physically aligned with an opposite contact in the first row, and the second row of contacts includes a third contact disposed opposite and physically aligned with the first contact in the first row, and wherein the third contact in the second row of contacts is electrically coupled to the second contact in the first row; and 
 (3) forming respective operational circuitry electrically coupled to at least one contact on the first row; 
   wherein at least two of the plurality of devices have distinct operational circuitry.   
     
     
         2 . The method of  claim 1 , wherein at least a subset of the plurality of devices have identical contact layouts on each of the subset of the plurality of devices. 
     
     
         3 . The method of  claim 2 , wherein at least the subset of the plurality of devices have identical via layouts on each of the subset of the plurality of devices. 
     
     
         4 . The method of  claim 1 , further comprising stacking the plurality of devices above one another. 
     
     
         5 . The method of  claim 1 , wherein the plurality of devices include a first device and a second device stacked directly on top of the first device, further comprising:
 electrically coupling the first and second devices via one or more contacts on the second row of the first device and one or more contacts on the first row of the second device.   
     
     
         6 . The method of  claim 5 , wherein the one or more contacts on the first row of the second device includes the at least one contact of the second device, and the corresponding one or more contacts on the second row of the first device includes the third contact of the first device that is electrically coupled to the second contact on the first row of the first device. 
     
     
         7 . The method of  claim 6 , wherein the operational circuitry of the second device is electrically coupled to the at least one contact of the second device, and further coupled to the first device via the at least one contact on the second device and the third contact on the first device. 
     
     
         8 . The method of  claim 1 , wherein at least one of the plurality of devices is selected from a group consisting of an integrated circuit, a semiconductor die, an integrated circuit package, and a module containing one or more dies or packages. 
     
     
         9 . The method of  claim 1 , wherein at least one of the plurality of devices further includes a RDL that wraps around a edge of the at least one of the plurality of devices and couples two electrical contacts located on the first and second surfaces of the at least one of the plurality of devices, respectively. 
     
     
         10 . The method of  claim 1 , wherein for each of the plurality of devices, the first row of contacts are evenly spaced on the first surface with a contact pitch, and the second row of contacts are also evenly spaced on the second surface. 
     
     
         11 . The method of  claim 10 , further comprising:
 arranging at least two of the plurality of devices in a stair-like manner when the at least two of the plurality of devices are offset from one another by a spatial distance that is substantially equal to the contact pitch.   
     
     
         12 . A method for making a semiconductor device, comprising:
 for each of a plurality of semiconductor chips that each include a substrate having a first surface and an opposing second surface:
 forming a first row of contacts on the first surface, wherein the first row of contacts includes a first contact and a second contact that are adjacent to each other; 
 forming a second row of contacts on the second surface, wherein each contact in the second row of contacts is physically aligned with an opposite contact in the first row, and the second row of contacts includes a third contact disposed opposite and physically aligned with the first contact in the first row, and wherein the third contact in the second row of contacts is electrically coupled to the second contact in the first row; and 
 forming operational circuitry electrically coupled to at least one contact on the first row; and 
   stacking the plurality of semiconductor chips one on top of the other, wherein at least two of the plurality of semiconductor chips have distinct operational circuitry.   
     
     
         13 . The method of  claim 12 , wherein the plurality of semiconductor chips are stacked symmetrically above one another. 
     
     
         14 . The method of  claim 12 , wherein the stacking comprises arranging at least two of the plurality of semiconductor chips in a stair-like manner when the at least two of the plurality of semiconductor chips are offset from one another. 
     
     
         15 . The method of  claim 12 , wherein, for each of the plurality of semiconductor chips, the first row of contacts are part of a first array of electrical contacts on the first surface of the substrate, and the second row of contacts are part of a second array of electrical contacts on the second surface of the substrate. 
     
     
         16 . The method of  claim 12 , wherein, for at least one of the plurality of semiconductor chips, at least one contact in the second row of contacts is electrically coupled to its opposite contact in the first row. 
     
     
         17 . A method for making an electronic system, comprising:
 forming each of a plurality of semiconductor chips by:
 providing a substrate having a first surface and an opposing second surface; 
 forming a first row of contacts on the first surface, wherein the first row of contacts includes a first contact and a second contact that are adjacent to each other; 
 forming a second row of contacts on the second surface, wherein each contact in the second row of contacts is physically aligned with an opposite contact in the first row, and the second row of contacts includes a third contact disposed opposite and physically aligned with the first contact in the first row, and wherein the third contact in the second row of contacts is electrically coupled to the second contact in the first row; and 
 forming operational circuitry electrically coupled to at least one contact on the first row; 
   stacking a first set of the plurality of semiconductor chips to form a first semiconductor device, wherein at least two of the plurality of semiconductor chips in the first set have distinct operational circuitry; and   stacking a second set of the plurality of semiconductor chips to form a second semiconductor device, wherein at least two of the plurality of semiconductor chips in the second set have distinct operational circuitry.   
     
     
         18 . The method of  claim 17 , wherein for at least one of the first or second semiconductor devices, every two adjacent chips of the plurality of semiconductor chips are electrically coupled via at least one contact on each of corresponding opposing surfaces of the respective two adjacent chips. 
     
     
         19 . The method of  claim 18 , wherein the at least one contact on each of the corresponding opposing surfaces of every two adjacent chips is selected from a group consisting of a metal bump, a conductive pad, and a redistribution layer (RDL). 
     
     
         20 . The method of  claim 17 , wherein for at least one of the first or second semiconductor devices, the plurality of semiconductor chips includes a first chip and a second chip that are separated by one or more chips, and the operational circuitry electrically coupled to the first contact of the first chip is electrically coupled to the second chip via the at least one contact on each of the corresponding opposing surfaces of every two adjacent chips arranged between the first and second chips.