Semiconductor device

Abstract

A semiconductor device is made by a manufacturing method that includes forming an organic insulating layer on a semiconductor on which metal wiring is provided, the organic insulating layer having an opening to expose part of the metal wiring, forming a seed metal covering the part of the metal wiring exposed from the opening, and an inside face and an around portion of the opening of the organic insulating layer, forming a mask covering an edge of the seed metal and exposing part of the seed metal formed in the opening, and forming a barrier metal on the seed metal exposed from the mask by electroless plating. The mask includes an organic material or an inorganic dielectric material.

1 - 19 . (canceled) 
     
     
         20 . A semiconductor device comprising:
 a semiconductor region;   a metal wiring on a surface of the semiconductor region;   an organic insulating layer on the surface of the semiconductor region, the organic insulating layer having a first opening to expose part of the metal wiring;   a seed metal layer covering the part of the metal wiring exposed from the first opening, an inside face of the organic insulating layer in the first opening, and a portion of the organic insulating layer around the first opening;   a mask covering an edge of the seed metal layer, the mask having a second opening to expose part of the seed metal layer;   a barrier metal layer on the seed metal layer exposed from the second opening of the mask, the barrier metal layer having an outside face in contact with an inside face of the second opening of the mask; and   a solder ball on both the barrier metal and the mask left unremoved,   wherein the mask primarily contains an inorganic dielectric material, and   wherein the barrier metal layer is located within a section defined by the mask in plan view.   
     
     
         21 . The semiconductor device according to  claim 20 , wherein the solder ball has a diameter of 160 μm. 
     
     
         22 . The semiconductor device according to  claim 20 , further comprising: a gold (Au) layer on the barrier metal, wherein the Au layer has a thickness of 10 nm. 
     
     
         23 . The semiconductor device according to  claim 20 , wherein the mask includes an insulating silicon compound. 
     
     
         24 . The semiconductor device according to  claim 20 , wherein the barrier metal is a nickel (Ni) layer, and a thickness of the Ni layer is from 3 μm to 6 μm. 
     
     
         25 . The semiconductor device according to  claim 20 , wherein the seed metal includes titanium (Ti) and palladium (Pd) on the titanium, and a thickness of the titanium is 50 nm, and a thickness of the palladium is 100 nm. 
     
     
         26 . The semiconductor device according to  claim 20 , wherein a distance between the edge of the seed metal and an inside edge of the mask is from 4 μm to 8 μm.