Multiphase injection locked sub-sampling phase locked loop (pll) circuit

Abstract

A system, method and electronic device are provided. The system includes a shared fractional-N phase-lock loop (PLL), a ring oscillator circuit (OSC), and a multiphase injection pulse generator configured to receive an input signal having a first frequency from the shared fraction-N PLL and generate injection pulses for the OSC based on the input signal.

What is claimed is: 
     
         1 . A system, comprising:
 a shared fractional-N phase-lock loop (PLL);   a ring oscillator circuit (OSC); and   a multiphase injection pulse generator configured to receive an input signal having a first frequency from the shared fraction-N PLL and generate injection pulses for the OSC based on the input signal.   
     
     
         2 . The system of  claim 1 , wherein the OSC includes a plurality of stages; 
     
     
         3 . The system of  claim 2 , wherein the multiphase injection pulse generator is further configured to generate a first set of injection pulses for each of the stages of the OSC. 
     
     
         4 . The system of  claim 3 , wherein the multiphase injection pulse generator is further configured to generate a second set of injection pulses for each of the stages of the OSC. 
     
     
         5 . The system of  claim 1 , further comprising a frequency and phase stabilization loop configured to synchronize stages of the OSC to the generated injection pulses. 
     
     
         6 . The system of  claim 1 , wherein the generated injection pulses are performed at a rising edge of the OSC. 
     
     
         7 . The system of  claim 1 , wherein the generated injection pulses are performed at a falling edge of the OSC. 
     
     
         8 . A method, comprising:
 generating, by a shared fractional-N phase-lock loop (PLL) an input signal having a first frequency;   receiving, by a multiphase injection pulse generator, the input signal having the first frequency; and   generating, by the multiphase injection pulse generator, injection pulses for a ring oscillator circuit (OSC) based on the received input signal.   
     
     
         9 . The method of  claim 8 , wherein the OSC includes a plurality of stages; 
     
     
         10 . The method of  claim 9 , further comprising generating, by the multiphase injection pulse generator, a first set of injection pulses for each of the stages of the OSC. 
     
     
         11 . The method of  claim 10 , further generating, by the multiphase injection pulse generator a second set of injection pulses for each of the stages of the OSC. 
     
     
         12 . The method of  claim 8 , further comprising synchronizing, by a frequency and phase stabilization loop, stages of the OSC to the generated injection pulses. 
     
     
         13 . The method of  claim 8 , wherein the generated injection pulses are performed at a rising edge of the OSC. 
     
     
         14 . The method of  claim 8 , wherein the generated injection pulses are performed at a falling edge of the OSC. 
     
     
         15 . A electronic device, comprising:
 at least one receiver;   a shared fractional-N phase-lock loop (PLL);   a ring oscillator circuit (OSC);   a multiphase injection pulse generator; and   a processor configured to receive, from the shared fractional-N PLL, an input signal having a first frequency and generate, by the multiphase injection pulse generator, injection pulses for the OSC based on the input signal.   
     
     
         16 . The electronic device of  claim 15 , wherein the OSC includes a plurality of stages; 
     
     
         17 . The electronic device of  claim 16 , wherein the processor is further configured to generate, by the multiphase injection pulse generator, a first set of injection pulses for each of the stages of the OSC. 
     
     
         18 . The electronic device of  claim 17 , wherein the processor is further configured to generate, by the multiphase injection pulse generator, a second set of injection pulses for each of the stages of the OSC. 
     
     
         19 . The electronic device of  claim 15 , further comprising a frequency and phase stabilization loop, wherein the processor is further configured to, by the frequency and phase stabilization loop, synchronize stages of the OSC to the generated injection pulses. 
     
     
         20 . The electronic device of  claim 15 , wherein the generated injection pulses are performed at a rising edge of the OSC.