Low-voltage collector-free bandgap voltage generator device

Abstract

Example implementations include a bandgap voltage device with a first current source operatively coupled to a bandgap input node and a bandgap output node and operable to output a first proportional-to-absolute-temperature (PTAT) current, a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the bandgap output node, and a second current source operatively coupled to the current mirror and operable to output a second PTAT current. Example implementations also include a bandgap transistor device with a first P+ layer proximate to a center of a planar surface of a transistor device, a first N+ layer at least partially surrounding the first P+ layer along the planar surface, a second P+ layer at least partially surrounding the first N+ layer along the planar surface, a second N+ layer at least partially surrounding the second P+ layer along the planar surface, and a third P+ layer at least partially surrounding the second N+ layer along the planar surface.

What is claimed is: 
     
         1 . A bandgap voltage device comprising:
 a first current source operatively coupled to a bandgap input node and a bandgap output node, and operable to output a first proportional-to-absolute-temperature (PTAT) current;   a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the bandgap output node; and   a second current source operatively coupled to the current mirror, and operable to output a second PTAT current.   
     
     
         2 . The bandgap voltage device of  claim 1 , further comprising:
 a third bandgap transistor operatively coupled to the bandgap output node and the current mirror.   
     
     
         3 . The bandgap voltage device of  claim 2 , wherein the third bandgap transistor operatively couples the second current source to the current mirror. 
     
     
         4 . The bandgap voltage device of  claim 1 , further comprising:
 a voltage divider operatively coupled to the first bandgap transistor and the second bandgap transistor.   
     
     
         5 . The bandgap voltage device of  claim 1 , further comprising:
 a first biasing transistor operatively coupled to the bandgap input node, the first current source, the current mirror, and the bandgap output node;   
     
     
         6 . The bandgap voltage device of  claim 5 , further comprising:
 a second biasing transistor operatively coupled to the first current source, the second current source, and the first biasing transistor.   
     
     
         7 . The bandgap voltage device of  claim 1 , wherein the first current source and the second current source comprise at least a proportional-to-absolute-temperature (PTAT) current generator. 
     
     
         8 . The bandgap voltage device of  claim 1 , wherein the first bandgap transistor, the second bandgap transistor, and the third bandgap transistor each comprise a bipolar junction transistor. 
     
     
         9 . The bandgap voltage device of  claim 8 , wherein the bipolar junction transistor comprises a first P+ layer proximate to a center of a planar surface of the transistor device. 
     
     
         10 . The bandgap voltage device of  claim 9 , wherein the bipolar junction transistor further comprises a first N+ layer at least partially surrounding the plurality of emitter layers, and a second P+ layer at least partially surrounding the first N+ layer. 
     
     
         11 . The bandgap voltage device of  claim 10 , wherein the bipolar junction transistor further comprises a second N+ layer at least partially surrounding the second P+ layer, and a third P+ layer at least partially surrounding the second N+ layer. 
     
     
         12 . A bandgap transistor device, comprising:
 a first P+ layer proximate to a center of a planar surface of a transistor device; and   a first N+ layer at least partially surrounding the first P+ layer along the planar surface.   
     
     
         13 . The bandgap transistor device of  claim 12 , further comprising:
 a second P+ layer at least partially surrounding the first N+ layer along the planar surface.   
     
     
         14 . The bandgap transistor device of  claim 13 , further comprising:
 a second N+ layer at least partially surrounding the second P+ layer along the planar surface.   
     
     
         15 . The bandgap transistor device of  claim 14 , further comprising:
 a third P+ layer at least partially surrounding the second N+ layer along the planar surface.   
     
     
         16 . The bandgap transistor device of  claim 13 , further comprising:
 a high voltage p-well region disposed below the first P+ layer, the first N+ layer, and the second P+ layer.   
     
     
         17 . The bandgap transistor device of  claim 13 , wherein a first bandgap transistor comprises a first instance of the bandgap transistor device and a second bandgap transistor comprises a second instance of the bandgap transistor device, and
 wherein a bandgap voltage device includes a first current source operatively coupled to a bandgap input node and a bandgap output node, a current mirror including the first bandgap transistor and the second bandgap transistor and operatively coupled to the bandgap output node, and a second current source operatively coupled to the current mirror.   
     
     
         18 . The bandgap transistor device of  claim 17 , wherein a third bandgap transistor comprises a third instance of the bandgap transistor device, and
 wherein the third bandgap transistor operatively is coupled to the bandgap output node, the first current source, and the current mirror.   
     
     
         19 . A system comprising:
 a proportional-to-absolute-temperature (PTAT) current generator;   a bandgap voltage device operatively coupled to the PTAT current generator, a bandgap input node and a bandgap output node; and   a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the PTAT current generator and the bandgap output node.   
     
     
         20 . The system of  claim 1 , further comprising a thermal shutdown (TSD) controller circuit operatively coupled to the bandgap output node.