US2021051620A1PendingUtilityA1

Method and system for link synchronization in an lte-tdd architecture

Assignee: DALI SYSTEMS CO LTDPriority: Apr 3, 2015Filed: Oct 16, 2020Published: Feb 18, 2021
Est. expiryApr 3, 2035(~8.7 yrs left)· nominal 20-yr term from priority
H04W 88/085H04J 3/06H04L 5/14H04L 27/2656H04L 27/2675H04L 5/1469H04W 56/00H04W 56/001H04L 25/03H04L 5/0053H04L 5/0048H04W 56/0095H04B 17/318H04B 7/04
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Claims

Abstract

A method of detecting a synchronization switching pulse using a power detector in a time division duplexing (TDD) system includes receiving an input signal, detecting a power level associated with the input signal using a digital power meter, and determining a configuration associated with the input signal. The method also includes determining that a pulse width associated with the input signal is greater than a threshold, determining an offset associated with a special subframe configuration, and generating an estimated sync pulse. The method further includes forming a regenerated sync pulse, determining an error between the estimated sync pulse and the regenerated sync pulse, determining that the error is less than a threshold, and providing a lock detect.

Claims

exact text as granted — not AI-modified
1 . A method of generating a synchronization switching pulse in a time division duplexing (TDD) system, the method comprising:
 receiving an input signal at an input port of a digital power meter;   receiving, at the digital power meter, a power threshold level;   measuring, using the digital power meter, a power level associated with the input signal;   determining that the power level associated with the input signal exceeds the power threshold level;   determining, for the input signal, a number of rising edges, a number of falling edges, locations of the rising edges, and locations of the falling edges;   determining, for the input signal, one or more pulse widths measured between the locations of the rising edges and the falling edges;   determining a downlink/uplink configuration associated with the input signal;   determining that at least one of the one or more pulse widths is greater than a threshold;   forming an estimated sync pulse;   determining a special subframe configuration associated with the input signal;   determining an offset;   forming a regenerated sync pulse;   determining, using an error detector, an error between the estimated sync pulse and the regenerated sync pulse;   determining that the error is less than an error threshold; and   providing the regenerated sync pulse as the synchronization switching pulse.   
     
     
         2 - 18 . (canceled)

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