Memory management for a hierarchical memory system

Abstract

Disclosed are systems and methods for managing memory. A memory management system may include a table having multiple virtual memory addresses. Each virtual memory address may correspond to a physical memory address and data that identifies a type of memory device corresponding to the physical memory address. The physical memory device can be used to access the memory device when a table hit occurs.

What is claimed is: 
     
         1 . A memory management system comprising:
 a first memory comprising a first plurality of devices and configured to store a first translation table, wherein the first memory is configured to retrieve data stored in the first translation table according to a first speed based on operation of the first plurality of devices; and   a second memory comprising a second plurality of devices and configured to store a second translation table, wherein the second memory is configured to retrieve data stored in the second translation table according to a second speed based on operation of the second plurality of devices, wherein the second memory and the first memory are configured to exchange a first table entry of the first translation table with a second table entry of the second translation table based on an access pattern, and wherein the access pattern indicates how frequently the first table entry was accessed relative to at least a third table entry.   
     
     
         2 . The memory management system of  claim 1 , comprising:
 a controller configured to:
 determine that a first set of data is accessed more often than a second set of data; 
 perform a memory swap to exchange the first set of data stored in a first type of memory with a second set of data stored in a second type of memory; and 
 update corresponding table entries for the first set of data and the second set of data with a revised mapping between a virtual memory address and a physical memory address, revised device data, updated least recently used (LRU) data. 
   
     
     
         3 . The memory management system of  claim 2 , wherein the controller is configured to move the first set of data and the second set of data concurrently. 
     
     
         4 . The memory management system of  claim 2 , wherein the second type of memory is characterized by operating speeds greater than the first type of memory. 
     
     
         5 . The memory management system of  claim 1 , wherein:
 the first translation table stores indications of an association between a first virtual memory address, a first physical memory address, first data that indicates how frequently the first physical memory address is accessed, and second data that identifies a first memory type of a first memory device comprising the first physical memory address, and   the second translation table stores indications of an association between a second virtual memory address, a second physical memory address, third data that indicates how frequently the second physical memory address is accessed, and fourth data that identifies a second memory type of a second memory device comprising the second physical memory address; and   a control unit configured to control operation of the first memory device and the second memory device based at least in part on the first translation table and the second translation table.   
     
     
         6 . The memory management system of  claim 1 , wherein the first translation table and the second translation table comprise non-overlapping data. 
     
     
         7 . The memory management system of  claim 1 , wherein a hybrid memory cube or pattern recognition device comprises the first memory and the second memory. 
     
     
         8 . The memory management system of  claim 1 , comprising:
 a translation lookaside buffer configured to store the first translation table, wherein the first memory comprises the translation lookaside buffer; and   a hybrid memory cube or pattern recognition device configured to store the second translation table, wherein the second memory comprises the hybrid memory cube or pattern recognition device.   
     
     
         9 . The memory management system of  claim 1 , comprising a controller configured to search the first translation table and the second translation table concurrently. 
     
     
         10 . A method comprising:
 receiving a virtual memory address;   searching a first translation table for the virtual memory address;   searching a second translation table for the virtual memory address after searching the first translation table; and   moving an entry from the second translation table corresponding to the virtual memory address to the first translation table.   
     
     
         11 . The method of  claim 10 , comprising moving an entry from the second translation table corresponding to the virtual memory address to the first translation table stored in a translation lookaside buffer. 
     
     
         12 . The method of  claim 10 , wherein searching the first translation table for the virtual memory address comprises searching indications stored in the first translation table, wherein the indications associate respective virtual memory addresses with a respective physical memory address, respective first data that indicates how frequently the respective physical memory address is accessed, and respective second data that identifies a respective memory type from a plurality of memory types corresponding to a memory device referenced by the respective physical memory address. 
     
     
         13 . The method of  claim 10 , wherein searching the first translation table for the virtual memory address comprises searching indications stored in the first translation table via communication with a translation lookaside buffer. 
     
     
         14 . The method of  claim 10 , wherein searching the second translation table for the virtual memory address comprises searching indications stored in the second translation table via communication with a translation device, wherein the indications comprise second data that indicates how frequently a second physical memory address is accessed. 
     
     
         15 . The method of  claim 10 , wherein moving the entry from the second translation table corresponding to the virtual memory address to the first translation table comprises:
 identifying first data for the virtual memory address stored in the second translation table;   identifying second data from the first translation table for a least accessed physical memory address;   determining to swap storage locations within the first translation table and the second translation table by exchanging the entry corresponding to the first data with an additional entry corresponding to the second data; and   moving the entry from the second translation table to the first translation table and moving the additional entry from the first translation table to the second translation table.   
     
     
         16 . A method for managing a memory address space of a computer system comprising:
 identifying that a table entry in a first translation table corresponds to a virtual memory address that was accessed a number of times less than a threshold number of accesses;   determining to change a type of memory device corresponding to the virtual memory address in response to identifying that the table entry indicates that the virtual memory address was accessed less than the threshold number of accesses; and   in response to determining to change the type of memory device, deallocating a first physical memory address of a first memory device from the virtual memory address and allocating a second physical memory address to the virtual memory address, wherein the second physical memory address corresponds to an allocation of a portion of a second memory device for the virtual memory address.   
     
     
         17 . The method of  claim 16 , comprising determining to allocate the second physical memory address to the virtual memory address based at least in part on relative memory speeds of the second memory device and the first memory device. 
     
     
         18 . The method of  claim 16 , comprising:
 searching a second translation table for the table entry indicating the virtual memory address before identifying that the table entry in the first translation table corresponds to the virtual memory address accessed the number of times less than the threshold number of accesses; and   moving an entry from the second translation table corresponding to the virtual memory address to the first translation table in response to identifying that the table entry indicates that the virtual memory address was accessed less than the threshold number of accesses.   
     
     
         19 . The method of  claim 16 , wherein the first memory device and the second memory device comprise different memory types. 
     
     
         20 . The method of  claim 16 , comprising:
 receiving an indication to search for an additional table entry;   determining that neither of the first translation table or a translation lookup buffer comprise the additional table entry; and   generating a page fault in response to determining that neither of the first translation table or the translation lookup buffer comprise the additional table entry.