US2021021268A1PendingUtilityA1

Apparatus For Flexible Electronic Interfaces And Associated Methods

Assignee: ALTERA CORPPriority: Jan 13, 2012Filed: Oct 2, 2020Published: Jan 21, 2021
Est. expiryJan 13, 2032(~5.5 yrs left)· nominal 20-yr term from priority
Inventors:Tony Ngai
H10W 90/724H10W 90/722H10W 90/291H10W 70/635H10W 70/611H10W 70/65H10W 70/63H10W 90/00H03K 19/017509H03K 19/017581G06F 30/39H03K 19/17744H01L 2224/16225H01L 25/0655H01L 2224/16145H01L 25/0657H01L 2924/15192H01L 2924/15311
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Claims

Abstract

A semiconductor die includes at least one flexible interface block. The flexible interface block includes at least one interconnect, and at least one buffer coupled to the at least one interconnect. The flexible interface block further includes a routing interface coupled to circuitry integrated in the semiconductor die, and a controller coupled to provide communication between the routing interface and the at least one buffer.

Claims

exact text as granted — not AI-modified
1 . A system, comprising:
 an integrated circuit having an interface block that includes:
 control circuitry; and 
 a routing interface coupled to the control circuitry, wherein the control circuitry is configured to receive an input signal and to provide the received input signal to the routing interface. 
   
     
     
         2 . The system defined in  claim 1 , wherein the input signal comprises a signal received from a first circuit external to the integrated circuit. 
     
     
         3 . The system defined in  claim 2 , wherein the first circuit is implemented on a first die external to the integrated circuit. 
     
     
         4 . The system defined in  claim 3 , wherein the interface block is configured to be coupled to a second circuit, and the second circuit is implemented on a second die. 
     
     
         5 . The system defined in  claim 4 , wherein the integrated circuit is configured to provide the input signal to the second circuit. 
     
     
         6 . The system defined in  claim 1 , wherein the routing interface is configured to receive an additional input signal and to provide the received additional input signal to the control circuitry. 
     
     
         7 . The system defined in  claim 6 , wherein the integrated circuit has additional circuitry, and the additional circuitry is configured to provide the additional input signal. 
     
     
         8 . The system defined in  claim 6 , wherein one of the input signal and the additional input signal comprises a power signal. 
     
     
         9 . The system defined in  claim 1 , wherein the integrated circuit has additional circuitry external to the routing interface, and the routing interface is configured to provide communications between the additional circuitry and the control circuitry. 
     
     
         10 . The system defined in  claim 1 , wherein the routing interface comprises programmable circuitry. 
     
     
         11 . The system defined in  claim 1 , wherein the interface block further includes a buffer, and the buffer is configured to provide the input signal to the control circuitry. 
     
     
         12 . The system defined in  claim 11 , wherein the buffer is configured to selectively modify a received signal to generate the input signal. 
     
     
         13 . The system defined in  claim 12 , wherein the input signal comprises a signal selected from the group consisting of a data signal, a power signal, a control signal, and a status signal. 
     
     
         14 . The system defined in  claim 11 , wherein the interface block further includes an additional buffer, and the additional buffer is configured to receive an output signal from the control circuitry. 
     
     
         15 . A system, comprising:
 an interface block configured to couple a first circuit in a first die to a second circuit in a second die, the interface block including:
 a controller; and 
 a programmable routing interface coupled to the controller and configured to selectively provide signals between the first circuit and the second circuit based on a control signal from the controller. 
   
     
     
         16 . The system defined in  claim 15 , wherein the interface block includes buffer circuitry configured to be coupled between the programmable routing interface and the second circuit. 
     
     
         17 . The system defined in  claim 15 , wherein the programmable routing interface comprises a programmable interconnect. 
     
     
         18 . The system defined in  claim 17 , wherein the programmable interconnect is configurable by configuration data stored on memory circuitry for the interface block. 
     
     
         19 . An integrated circuit, comprising:
 a plurality of flexible interface blocks, each configured to couple to corresponding circuitry on a respective plurality of semiconductor dies and each comprising:
 a routing interface configured to route signals received from the corresponding circuitry on a corresponding semiconductor die in the plurality of semiconductor dies; and 
   a controller configured to provide respective control signals to each of the routing interfaces in the plurality of flexible interface blocks.   
     
     
         20 . The integrated circuit defined in  claim 19 , wherein the routed signals comprise a signal selected from the group consisting of a data signal, a power signal, a control signal, and a status signal.

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