Storage memory device

Abstract

A storage memory device includes a field effect transistor including a semiconductor substrate, a first insulating layer that is disposed on the semiconductor substrate, a source and a drain that are formed on the semiconductor substrate and spaced apart from each other, a stacked structure, and a gate. The stacked structure includes a charge trapping layer and a composite element that has a ferroelectric layer and an antiferroelectric layer. The ferroelectric layer is made of a doped hafnium oxide-based material having a predominantly orthorhombic phase and exhibiting a negative capacitance. The antiferroelectric layer is made of a zirconium oxide-based material having a predominantly tetragonal phase.

What is claimed is: 
     
         1 . A storage memory device, comprising a field effect transistor including:
 a semiconductor substrate;   a first insulating layer disposed on said semiconductor substrate;   a source and a drain formed on said semiconductor substrate and spaced apart from each other;   a stacked structure disposed on said first insulating layer opposite to said semiconductor substrate and including a charge trapping layer and a composite element that has a ferroelectric layer and an antiferroelectric layer, said ferroelectric layer being made of a doped hafnium oxide-based material that has a predominantly orthorhombic phase and that exhibits a negative capacitance, said antiferroelectric layer being made of a zirconium oxide-based material having a predominantly tetragonal phase; and   a gate disposed on said stacked structure opposite to said first insulating layer.   
     
     
         2 . The storage memory device of  claim 1 , wherein said charge trapping layer is made of a material selected from the group consisting of silicon nitride, silicon carbide, a high dielectric constant oxide having a non-orthorhombic phase, and combinations thereof. 
     
     
         3 . The storage memory device of  claim 2 , wherein said high dielectric constant oxide is selected from the group consisting of zirconium oxide, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, zirconium oxynitride, hafnium oxynitride, silicon oxynitride, aluminum oxynitride, titanium oxynitride, tantalum oxynitride, hafnium silicon oxide, zirconium silicon oxide, and combinations thereof. 
     
     
         4 . The storage memory device of  claim 1 , wherein said doped hafnium oxide-based material is selected from the group consisting of aluminum (Al)-doped hafnium oxide, silicon (Si)-doped hafnium oxide, strontium (Sr)-doped hafnium oxide, zirconium (Zr)-doped hafnium oxide, lanthanum (La)-doped hafnium oxide, yttrium (Y)-doped hafnium oxide, gadolinium (Gd)-doped hafnium oxide, and combinations thereof. 
     
     
         5 . The storage memory device of  claim 4 , wherein:
 when said doped hafnium oxide-based material is Al-doped hafnium oxide, Al is present in an amount ranging from 2 mol % to 10 mol % based on a total molar amount of said Al-doped hafnium oxide;   when said doped hafnium oxide-based material is Si-doped hafnium oxide, Si is present in an amount ranging from 2 mol % to 10 mol % based on a total molar amount of said Si-doped hafnium oxide;   when said doped hafnium oxide-based material is Sr-doped hafnium oxide, Sr is present in an amount ranging from 2 mol % to 15 mol % based on a total molar amount of said Sr-doped hafnium oxide;   when said doped hafnium oxide-based material is Zr-doped hafnium oxide, Zr is present in an amount ranging from 1 mol % to 50 mol % based on a total molar amount of said Zr-doped hafnium oxide;   when said doped hafnium oxide-based material is La-doped hafnium oxide, La is present in an amount ranging from 2 mol % to 15 mol % based on a total molar amount of said La-doped hafnium oxide;   when said doped hafnium oxide-based material is Y-doped hafnium oxide, Y is present in an amount ranging from 2 mol % to 15 mol % based on a total molar amount of said Y-doped hafnium oxide; and   when said doped hafnium oxide-based material is Gd-doped hafnium oxide, Gd is present in an amount ranging from 2 mol % to 15 mol % based on a total molar amount of said Gd-doped hafnium oxide.   
     
     
         6 . The storage memory device of  claim 1 , wherein said zirconium oxide-based material includes one of undoped zirconium oxide, doped zirconium oxide and the combination thereof. 
     
     
         7 . The storage memory device of  claim 6 , wherein said zirconium oxide-based material includes at least one of doped zirconium oxide that is zirconium oxide doped with a dopant, said dopant being selected from the group consisting of silicon, aluminum, germanium, yttrium, hafnium and nitrogen, and being present in an amount greater than 0 mol % and not greater than 50 mol % based on a total molar amount of said doped zirconium oxide. 
     
     
         8 . The storage memory device of  claim 1 , wherein each of said ferroelectric layer, said antiferroelectric layer and said charge trapping layer has a thickness ranging from 1 nm to 30 nm. 
     
     
         9 . The storage memory device of  claim 1 , wherein said field effect transistor further includes a second insulating layer disposed between said stacked structure and said gate. 
     
     
         10 . The storage memory device of  claim 9 , wherein said second insulating layer is made of a dielectric insulating material having a non-orthorhombic phase. 
     
     
         11 . The storage memory device of  claim 1 , wherein said stacked structure further includes a third insulating layer disposed between said charge trapping layer and said composite element. 
     
     
         12 . The storage memory device of  claim 11 , wherein said third insulating layer is made of a dielectric insulating material having a non-orthorhombic phase. 
     
     
         13 . The storage memory device of  claim 1 , wherein said field effect transistor is a fin field effect transistor. 
     
     
         14 . The storage memory device of  claim 13 , wherein said fin field effect transistor includes a fin structure that is disposed on said semiconductor substrate and that contains said source, said drain and a connecting section between said source and said drain, said stacked structure being disposed on said connecting section and covering a portion of said first insulating layer. 
     
     
         15 . The storage memory device of  claim 14 , wherein said fin structure extending upwardly from said semiconductor substrate, said first insulating layer covering at least a portion of said semiconductor substrate and a portion of a peripheral surface of said fin structure.