Semiconductor device including a leadframe or a diode bridge configuration

Abstract

A monolithic semiconductor device has a substrate with a power region and control region. The substrate can be a silicon-on-insulator substrate. An opening is formed in the power region and extends partially through the substrate. A semiconductor material is formed within the opening. A power semiconductor device, such as a vertical power transistor, is formed within the semiconductor material. A control logic circuit is formed in the control region. A first isolation trench is formed in the power region to isolate the power semiconductor device and control logic circuit. A second isolation trench is formed in the control region to isolate a first control logic circuit from a second control logic circuit. An interconnect structure is formed over the power region and control region to provide electrical interconnect between the control logic circuit and power semiconductor device. A termination trench is formed in the power region.

1 - 20 . (canceled) 
     
     
         21 . A semiconductor device, comprising:
 a die having a top side and a backside opposite the top side, wherein the die includes:
 a first region having a first contact along the backside of the die; 
 a second region having a second contact along the top side of the die; and 
 a first isolation electrically isolating the first region from the second region along the backside of the die; 
   a first lead finger electrically connected to the first contact, wherein the first lead finger extends along the backside of the die; and   a second lead finger electrically connected to the second contact.   
     
     
         22 . The semiconductor device of  claim 21 , wherein the first region includes a power semiconductor device, and the second region includes a control logic circuit. 
     
     
         23 . The semiconductor device of  claim 21 , wherein the die further comprises a second isolation electrically isolating the first region from the second region along the top side of the die. 
     
     
         24 . The semiconductor device of  claim 21 , further comprising a third lead finger, wherein the first region further includes a third contact along the top side of the die, wherein the third contact is electrically connected to the third lead finger. 
     
     
         25 . The semiconductor device of  claim 21 , wherein:
 the second region further includes a control logic circuit and a buried oxide layer,   the control logic circuit is closer to the top side of the die than to the backside of the die, and   the buried oxide layer is disposed between the control logic circuit and the backside of the die.   
     
     
         26 . The semiconductor device of  claim 21 , wherein the second region further includes a third contact that is electrically connected to the first lead finger. 
     
     
         27 . The semiconductor device of  claim 21 , further comprising a third lead finger spaced apart from the first lead finger and the second lead finger, wherein:
 the die further includes a third region, wherein the second region is disposed between the first region and the third region,   the third lead finger is electrically connected to the first region, and the third lead finger extends along the top side of the die, and   no lead finger extends along the backside of the die.   
     
     
         28 . A semiconductor device, comprising:
 a die including a first region, a second region, and a third region;   a first lead finger electrically connected to the first region, wherein the first lead finger extends along a backside of the die; and   a second lead finger electrically connected to the third region, wherein the second lead finger extends along backside of the die and is spaced apart from the first lead finger.   
     
     
         29 . The semiconductor device of  claim 28 , wherein the die further comprises an isolation electrically isolating the first region from the second region along the top side of the die. 
     
     
         30 . The semiconductor device of  claim 28 , wherein the die further includes:
 a substrate including a semiconductor wafer lying along a backside surface of the substrate, wherein the semiconductor wafer includes a first portion associated with the first region and a second portion associated with the second region; and   an isolation trench along the backside surface of the substrate and extending through the semiconductor wafer, wherein the isolation trench separates the first portion of the substrate from the second portion of the substrate.   
     
     
         31 . The semiconductor device of  claim 28 , wherein the first region includes a power semiconductor device, and the second region includes a control logic circuit. 
     
     
         32 . The semiconductor device of  claim 28 , wherein:
 the die further comprises a conductive layer that includes a drain contact within the third region, wherein the conductive layer lies along the backside of the die, and   the drain contact is electrically connected to the second lead finger.   
     
     
         33 . The semiconductor device of  claim 28 , further comprising a fourth region, wherein:
 the second region further includes a first contact that is electrically connected to the first lead finger, and   the fourth region includes a second contact that is electrically connected to the second lead finger.   
     
     
         34 . The semiconductor device of  claim 28 , wherein each of the first lead finger and the second lead finger does not extend over or under the second region. 
     
     
         35 . A semiconductor device, comprising:
 a die having a first side and a second side opposite the first side and including a diode bridge, wherein the diode bridge includes:
 a first diode within a first region, wherein the first diode has an anode and a cathode; 
 a second diode within a second region, wherein the second diode has an anode and a cathode; 
 a third diode within a third region, wherein the third diode has an anode and a cathode; and 
 a fourth diode within a fourth region, wherein the fourth diode has an anode and a cathode, 
 wherein:
 the anode of the first diode is electrically coupled to the cathode of the fourth diode, 
 the cathode of the first diode is electrically coupled to the cathode of the second diode, 
 the anode of the second diode is electrically coupled to the cathode of the third diode, 
 the anode of the third diode is electrically coupled to the anode of the fourth diode, 
 first contacts to the anodes of the first, second, third, and fourth diodes are along the first side of the die, and 
 second contacts to the cathodes of the first, second, third, and fourth diodes are along the second side of the die. 
 
   
     
     
         36 . The semiconductor device of  claim 35 , wherein the die further comprises:
 a substrate that includes at least parts of the first, second, third, and fourth diodes;   a first isolation trench extending into the substrate along one of the first side and the second side of the die, wherein the first isolation trench electrically isolates the first region from the second region, the third region, or the fourth region; and   a second isolation trench extending into the substrate along the other of the first side and the second side of the die, wherein the second isolation trench electrically isolates the third region from the first region, the second region, or the fourth region.   
     
     
         37 . The semiconductor device of  claim 35 , further comprising a first conductor that contacts the anodes of the third diode and the fourth diode, and a second conductor that contacts the cathodes of the first diode and the second diode. 
     
     
         38 . The semiconductor device of  claim 35 , wherein at one of the first diode, the second diode, the third diode, and the fourth diode is a Schottky diode. 
     
     
         39 . The semiconductor device of  claim 35 , further comprising a first conductor and a second conductor, wherein the first conductor is along the first side or the second side of the die, and the second conductor is electrically connected to the first conductor and the die along the other of the first side or the second side of the die. 
     
     
         40 . The semiconductor device of  claim 35 , further comprising a first conductor and a second conductor, wherein both of the first conductor and the second conductor are along the first side or the second side of the die, and the first conductor is spaced apart from the second conductor.