Semiconductor structure and formation method thereof

Abstract

A semiconductor structure and a formation method thereof are provided. The formation method includes: providing a base, a dummy gate structure being formed on the base, a source/drain doping region being formed in the base on both sides of the dummy gate structure, a dielectric layer being formed on the base exposed by the dummy gate structure, and the dielectric layer covering the source/drain doping region; etching the dielectric layer on both sides of the dummy gate structure to form a contact hole exposing the source/drain doping region; forming a contact plug in the contact hole, the contact plug being electrically connected to the source/drain doping region; after forming the contact plug, removing the dummy gate structure, and forming a gate opening in the dielectric layer; and forming a gate structure in the gate opening. Embodiments of the present disclosure are advantageous to simplify process complexity and increase process windows.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a base;   a dummy gate structure, located on the base;   a source/drain doping region, located in the base on both sides of the dummy gate structure;   a dielectric layer, located on the base exposed by the dummy gate structure, the dielectric layer exposing a top of the dummy gate structure; and   a contact plug, located in the dielectric layer on a top of the source/drain doping region, the contact plug being electrically connected to the source/drain doping region.   
     
     
         2 . The semiconductor structure according to  claim 1 , wherein:
 a top of the contact plug is lower than the top of the dummy gate structure; and   the semiconductor structure further comprises: a protective layer, located on the top of the contact plug.   
     
     
         3 . The semiconductor structure according to  claim 2 , wherein:
 the top of the contact plug is lower than the top of the dummy gate structure; and   a top of the protective layer is flush with the top of the dummy gate structure.   
     
     
         4 . The semiconductor structure according to  claim 2 , wherein the material of the protective layer comprises silicon oxide. 
     
     
         5 . The semiconductor structure according to  claim 2 , wherein the protective layer has a thickness of 150 Å to 500 Å.