US2020406769A1PendingUtilityA1

Multilevel motor drive with integrated battery charger

Assignee: JABIL INCPriority: Mar 12, 2018Filed: Mar 12, 2019Published: Dec 31, 2020
Est. expiryMar 12, 2038(~11.6 yrs left)· nominal 20-yr term from priority
Y02T10/64H02P 27/14H02M 7/487H02M 7/483H02M 5/44H02M 1/0095B60L 53/24B60L 2210/14B60L 55/00Y02T10/7072B60L 58/21Y02T90/14H02P 27/08B60L 53/22H02M 1/42Y02T10/72Y02T10/70Y02E60/00B60L 50/60Y04S10/126
56
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

An apparatus, system and method for a multilevel electrical vehicle (EV) motor drive circuit with an integrated battery charger. The apparatus, system and method may include a direct current (DC) battery for the EV connected in parallel with a capacitance; and a three level inverter circuit in parallel with the DC battery and connected in neutral point bisection with the capacitance, comprising: a high frequency low voltage pulse width modulation circuit; and a low frequency fundamental switching circuit at least partially in parallel with the high frequency low voltage pulse width modulation circuit. Additionally included may be motor windings connected in neutral point bisection with the low frequency fundamental switching circuit; and a power factor correction boost charging circuit connected to the three level inverter circuit, and connected to an alternating current grid.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A multilevel electrical vehicle (EV) motor drive circuit with an integrated battery charger, comprising:
 a direct current (DC) battery for the EV connected in parallel with a capacitance;   a three level inverter circuit in parallel with the DC battery and connected in neutral point bisection with the capacitance, comprising:
 a high frequency low voltage pulse width modulation circuit; 
 a low frequency fundamental switching circuit at least partially in parallel with the high frequency low voltage pulse width modulation circuit; 
   motor windings connected in neutral point bisection with the low frequency fundamental switching circuit; and   a power factor correction boost charging circuit connected to the three level inverter circuit, and connected to an alternating current grid.   
     
     
         2 . The drive circuit of  claim 1 , wherein the DC battery is a split battery.  claim 1 , wherein the split battery has a mid connection to the capacitance neutral point 
     
     
         3 . A multilevel electric vehicle (EV) motor drive with an integrated battery charger, comprising:
 a direct current (DC) battery for the EV connected in parallel with a capacitance;   a three level inverter circuit in parallel with the DC battery and connected in neutral point bisection with the capacitance, comprising:
 an upper level bridge circuit connected between the battery positive and the capacitance neutral point; 
 a lower level bridge circuit connected between the battery negative and the capacitance neutral point; 
   a first mid level bridge circuit connected between the output of the upper and lower level bridge circuits;   motor windings connected to an output of the first mid level bridge circuit;   a second mid level bridge circuit connected in parallel to the first mid level bridge circuit; and   an inductance connected in series with an alternating current (AC) grid and an output of the second mid level bridge circuit output.   
     
     
         4 . The drive circuit of  claim 3 , wherein the DC battery is a split battery. 
     
     
         5 . The drive circuit of  claim 4 , wherein the split battery has a mid connection to the capacitance neutral point. 
     
     
         6 . The drive circuit of  claim 3 , wherein the upper level bridge circuit comprises a high frequency low voltage pulse width modulation circuit. 
     
     
         7 . The drive circuit of  claim 3 , wherein one of the upper level and the lower level bridge circuits comprises a low frequency fundamental switching circuit. 
     
     
         8 . The drive circuit of  claim 7 , wherein the low frequency switching circuit is at least partially in parallel with a high frequency low voltage pulse width modulation circuit.

Join the waitlist — get patent alerts

Track US2020406769A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.