Voltage threshold sensing systems and related methods

Abstract

Implementations of voltage sensing systems may include: a high side current mirror coupled to a reference current source coupled to at least one diode. The at least one diode may be coupled to a resistor and to a comparator. The resistor may be coupled to the ground. The comparator may be coupled with a reference voltage. The comparator may be configured to receive a comparison voltage from the diode and output whether the comparison voltage is higher or lower than the reference voltage.

What is claimed is: 
     
         1 . A voltage sensing system comprising:
 a high side current mirror coupled to a reference current source coupled to a Zener diode, the Zener diode coupled to a resistor and to a comparator;   wherein the resistor is coupled to ground; and   wherein the comparator is coupled with a reference voltage and configured to receive a comparison voltage from the Zener diode and to output whether the comparison voltage is higher or lower than the reference voltage.   
     
     
         2 . The system of  claim 1 , wherein the current mirror further comprises two p-channel metal-oxide-semiconductor field-effect (PMOS) transistors coupled together. 
     
     
         3 . The system of  claim 2 , wherein a gate of each of the two PMOS transistors are coupled to a drain of one of the two PMOS transistors. 
     
     
         4 . The system of  claim 1 , further comprising a second comparator coupled with a second reference voltage and configured to receive a second comparison voltage from the Zener diode and output whether the comparison voltage is higher or lower than the reference voltage. 
     
     
         5 . The system of  claim 1 , further comprising a second resistor coupled between the current mirror and the comparator. 
     
     
         6 . A voltage threshold sensing system comprising:
 two p-channel metal-oxide-semiconductor field-effect (PMOS) transistors coupled together, gates of the two PMOS transistors coupled to a drain of a first one of the two PMOS transistors, the drain of the first one of the two PMOS transistors coupled with a first constant current source, and a drain of a second one of the two PMOS transistors coupled to a diode; and   two n-channel metal-oxide-semiconductor field-effect (NMOS) transistors coupled together, gates of the two NMOS transistors coupled to the drain of a first one of the two NMOS transistors, the drain of the first one of the two NMOS transistors coupled with a second constant current source, and a drain of a second one of the two NMOS transistors coupled to the diode;   wherein the diode is coupled with an input of a comparator; and   wherein the comparator is configured to determine whether a supply voltage coupled to the first two PMOS transistors is above or below a reference voltage coupled to another input of the comparator.   
     
     
         7 . The system of  claim 6 , wherein the diode is a Zener diode. 
     
     
         8 . The system of  claim 6 , further comprising a second comparator coupled with a second reference voltage and configured to receive a second comparison voltage from the diode and output whether the comparison voltage is higher or lower than the reference voltage. 
     
     
         9 . The system of  claim 6 , further comprising a fifth transistor coupled between one of the two NMOS transistors and the comparator. 
     
     
         10 . The system of  claim 9 , wherein the fifth transistor is an NMOS transistor. 
     
     
         11 . A voltage threshold sensing system comprising:
 two p-channel metal-oxide-semiconductor field-effect (PMOS) transistors coupled together, the two PMOS transistors coupled with a first constant current source and with a diode; and   two n-channel metal-oxide-semiconductor field-effect (NMOS) transistors coupled together, the two NMOS transistors coupled with a second constant current source and with the diode;   wherein the diode is coupled with an input of a comparator; and   wherein the comparator is configured to determine whether a supply voltage coupled to the first two PMOS transistors is above or below a reference voltage coupled to another input of the comparator.   
     
     
         12 . The system of  claim 11 , wherein a drain of a first one of the two PMOS transistors is coupled with the first constant current source. 
     
     
         13 . The system of  claim 11 , wherein a drain of a first one of the two NMOS transistors is coupled with the second constant current source. 
     
     
         14 . The system of  claim 11 , wherein a drain of a second one of the two PMOS transistors is coupled to the diode. 
     
     
         15 . The system of  claim 11 , wherein a drain of a second one of the two NMOS transistors is coupled to the diode. 
     
     
         16 . The system of  claim 11 , wherein gates of the two PMOS transistors are coupled to a drain of a first one of the two PMOS transistors. 
     
     
         17 . The system of  claim 11 , wherein gates of the two NMOS transistors are coupled to a drain of a first one of the two NMOS transistors. 
     
     
         18 . The system of  claim 11 , wherein the diode is a Zener diode. 
     
     
         19 . The system of  claim 11 , further comprising a second comparator coupled with a second reference voltage and configured to receive a second comparison voltage from the diode and output whether the comparison voltage is higher or lower than the reference voltage. 
     
     
         20 . The system of  claim 11 , further comprising an NMOS transistor coupled between a source of one of the two NMOS transistors and the comparator.